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TOP Designer & FE Integrator

MediaTek Inc

HsinChuPosted Jun 22, 2026
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1. Top design for testing: uArch, design, simulation: - DFT top, PAD top 2. Top/sensor FE integration and simulation: - eFUSE - PVT sensor, aging sensor - IO integration based on customer requirement 3. Test sequence preparation for Post-Si test and HTOL 4. RFI/RFQ: Sync customer testing structure, IO and sensor requirement #LI-LYNN

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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