Computing System Architecture Engineer (Memory System Model and Optimization)

1. Memory subsystem (memory controller, system cache) and interconnect (on-chip and cross-chip) architecture design for Smart Phone, Automotive, High-performance Computing, or Data Center 2. System-level SW/HW behavioral power/performance analysis/optimization focusing on interplays between compute system (CPU/GPU/NPU/DSP/etc.) and memory system 3. Memory subsystem performance/power profiling, modeling, and competitive analysis #LI-JK1