Senior Lead Engineer Analog Validation
NXP Semiconductors Netherlands B.V.
PunePosted Sep 21, 2026
Overview
Generic Job Description (not Job Level specific): The Analog Validation Engineer / Architect is responsible for comprehensive validation of key product indicators (KPI's) as defined in the system compliance matrix for all analog circuitry in any given platform. This means understanding everything that needs to be measured and how to do those measurements in the most highly automated fashion possible. This also means reporting out those measurements in the most concise, clear and comprehensive possible ways. The Analog Validation Engineer is responsible for assuring all instrumentation, scripting and boards are prepared prior to silicon arrival on the bench.
• Oversee validation of:Analog block level validation – PMU (LDO, DCDC, GDET, FRO, OSC, References etc) , CGU (PLL etc) , ADC/DAC, WBIAS.System level validation and key customer MCU use cases validationDrive ATE and bench correlation.Low power optimizations to meet KPIs
• Ensure robust test plans, coverage models, and sign-off criteria.
• Own validation readiness for tape-out, risk production, and mass production.
• Set clear goals, KPIs, and execution frameworks for validation programs.
• Partner closely with:Design & Architecture teamsProduct EngineeringFirmware/Software teamsManufacturing & Quality
• Standardize validation methodologies across sites.
• Provide regular program updates to senior leadership.
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RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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