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Sr Custom Silicon Sales Executive

Cadence Design Systems, Inc.

Burlington, MASoC / ASICFull timePosted Oct 19, 2026
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence is seeking an experienced ASIC Services Sales Leader to manage and drive bookings and revenue for ASIC and silicon design services. This role will work closely with account teams, Services delivery, R&D, IP, and ecosystem partners to execute the Services go to market strategy. The successful candidate will have a strong background in complex ASIC services sales, contract negotiations, demonstrated people leadership experience, and the ability to manage large, multi stakeholder opportunities across strategic accounts. Job Description Key Responsibilities Sales Leadership • Lead, manage, develop and grow ASIC design services and silicon fulfillment business across the defined territoryEstablish clear performance expectations related to pipeline creation, opportunity qualification, forecasting accuracy, and bookings attainmentProvide regular deal reviews, coaching, and performance feedback to drive consistent executionParticipate in industry trade events, provide valuable competitive analysis, and promote Cadence products broadly Revenue & Pipeline Ownership • Own bookings, revenue, and pipeline targets for ASIC Services within assigned scopeDrive disciplined sales execution across complex, long-cycle services opportunitiesEnsure accurate forecasting and adherence to Cadence sales processes and toolsSupport territory and account planning efforts in collaboration with regional and global sales leadership Customer & Opportunity Management • Lead and support customer engagements for large, strategic ASIC Services opportunitiesAct as an ASIC specialist providing guidance and mentorship to account managersGuide proposal development, pricing strategy, and contract negotiations in coordination with internal stakeholdersEnsure consistent customer experience and alignment between sales commitments and delivery execution Cross-Functional Collaboration • Partner closely with Services delivery teams to align on scope, resourcing, and execution plansWork with IP, EDA, Foundry, and Ecosystem teams to position integrated solutions where appropriateProvide market and customer feedback to influence service offerings, enablement, and go‑to‑market priorities Operational & Business Management • Drive opportunity qualification rigor and appropriate resource allocationMonitor deal risk and escalate issues as needed to ensure business outcomes Minimum Qualifications • Bachelor’s degree required; advanced degree preferred15+ years of enterprise B2B sales experience, including experience selling ASIC, semiconductor, or design services5+ years of people management experience leading senior sales professionalsDemonstrated ability to close large, complex services engagementsStrong understanding of the ASIC design lifecycle and semiconductor ecosystemProven ability to work effectively across cross‑functional teams Preferred Qualifications • Experience selling integrated solutions combining tools, IP, and servicesFamiliarity with advanced-node, foundry, or hyperscaler customer environmentsPrior experience in EDA, Design IP, or silicon platformsStrong executive communication and negotiation skills Key Success Factors • Consistent delivery of bookings and revenue targetsStrong team performance, engagement, and talent developmentAccurate forecasting and operational disciplineEffective cross-functional alignment and customer satisfaction We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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