Package and Chip thermal/stress simulation engineer
HsinChuPosted Aug 4, 2025
Overview
1. Package related structure stress analysis including warpage, material study.
2. Package and board level stress modeling for TCT, drop and vibration.
3. IC and package thermal analysis, modeling and characterization
4. Chip-Package-PCB thermal co-simulation and design.
5. System level thermal simulation
6. System level stress simulation
#LI-JK1
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Original posting: careers.mediatek.com
RISC-V ecosystem
MediaTek Inc in the RISC-V ecosystem
RISC-V International: Strategic
We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.
- Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
- Listed on the landscape as a RISC-V International member
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