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Intern of the Device Modeling

Cadence Design Systems, Inc.

BEIJING 04RTL / HDLPosted Sep 21, 2026
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Skills named in this posting

  • Verilog
  • C
  • C++
  • Python
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job description: The candidate can assist us with Spectre Device modeling projects, which include speeding up performance and enhancing the reliability aging models based on specific device types. Requirements: • The candidate is familiar with C/C++ and Python programming languages. Familiarity with Verilog-A is preferred. • The candidate has a background in semiconductor device design and knowledge of semiconductor physics. Experience with the semiconductor extraction flow is a plus. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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