Design Verification DDR Lead

Key Responsibilities: 1. Develop and implement comprehensive verification plans for HBM4/4e IP and Subsystem. 2. Create and maintain testbenches, test cases, and verification environments using System verilog and UVM methodology. 3. Perform functional verification of RTL designs, including simulation, debugging, and coverage analysis. 4. Collaborate with design engineers to understand design specifications and requirements for IP and subsystems. 5. Identify and resolve design and verification issues, ensuring high-quality and robust designs. 6. Generate and analyze verification metrics to track progress and ensure coverage goals are met. 7. Participate in design and verification reviews, providing technical expertise and insights. 8. Stay updated with the latest verification technologies and methodologies and apply them to improve verification efficiency and effectiveness. 9. Mentor junior verification engineers and provide technical guidance.