Sr. Verif Engineer/Lead Verif Engineer
Overview
Generic Job Description (not Job Level specific): The Digital Verification Engineer / Architect is responsible for defining Design Verification strategy, plan and implement it for a IP, sub-system or IC level. Responsible for executing Digital verification to guarantee no “functional” fault exist, according to Specifications (Test cases) defined by product architects. Author of the Verification-specific documentation for internal and external use. Can be responsible for development of models or verification environment required specifically for Digital functional verification.
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Original posting: nxp.wd3.myworkdayjobs.com
RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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