Senior Principal GPU verification Engineer
Overview
Skills named in this posting
- SystemVerilog
- Verilog
- UVM
- Formal verification
- SVA
- Cache coherency
GPU verification lead
In this role you will be responsible for verifying complex GPU IPs and subsystems, ensuring functional correctness, performance, and first-pass silicon success, collaborating with global design and architecture teams
Key responsibilities
• Develop and execute verification plans for GPU IP blocks (vector graphics, shader cores, memory interfaces and caches)
• Build scalable SystemVerilog/UVM-based verification environments with reusable UVM components (agents, monitors, scoreboards)
• Develop models for GPU command processing, memory transactions and cache coherency
• Lead and mentor junior verification engineers
• Own end-to-end IP verification sign-off
• Manage regressions and debug failures
• Track coverage metrics and verification closure
Required expertise
Experience: 13+ years
• Strong experience in SystemVerilog, UVM, and Verilog
• Good understanding of Functional verification methodologies
• Assertions (SVA) and coverage
• Experience debugging complex RTL and testbench issues
• Experience in Formal verification is an added plus
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Original posting: nxp.wd3.myworkdayjobs.com
RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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