Post Silicon Validation Manager

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. Roles & Responsibilities: • Take responsibility for the Post silicon validation scope and plan for IPs like HSIO, Memory, RAS, Cores, LSIO, Power Management, Multimedia etc. • Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant test cases • Support the team with the right infrastructure at the right time • Define the scaling of the teams for Capability and Capacity in line with the BU’s growth • Bigger picture planning for roadmaps and process improvements • Create a cohesive culture of openness, diversity, technical growth for the team members • Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes • Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company • Exhibit great technical depth in the post silicon validation to take the right technical decisions for the team Individual requirements: • Highly skilled engineering professional with over 15 years of experience. • Solid experience in handling high performing, dynamic and a strong technical team. • Solid Experience and Knowledge in the post silicon validation of x86 IPs like Cores, Memory, RAS, HSIO. • Solid experience in handling the growth charter for growing teams and embrace changes with ease and grace • Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans • Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution. • Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW. • Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects. • Experience in Power Management, Power Delivery, and Power Measurements. • Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc. • Preferred experience with scripting using TCL, Python • Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills. Key responsibilities: • Ensuring the team delivers error free and timely delivery of test cases and test reports, meeting or beating the program commitment • Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts. • Actively participate in discussions with cross-functional teams in defining and refining test plans and guiding the team for the right path. • Be on top of all issues pertinent to Debug & Triage of any functional issues specific across the entire validation cycle • Drive meetings for issue closures and actively track schedules and milestone quality metrics • Ensure the Best in class Documentation and collateral delivery from the team. • Engage with the QA Validation and CAE teams for seamless handing over of test plans or reports, as relevant. #LI-NS2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. Roles & Responsibilities: • Take responsibility for the Post silicon validation scope and plan for IPs like HSIO, Memory, RAS, Cores, LSIO, Power Management, Multimedia etc. • Ensure robust planning at the pre-silicon stage, working with DV or Emulation teams and support the Leads and engineers in framing the relevant test cases • Support the team with the right infrastructure at the right time • Define the scaling of the teams for Capability and Capacity in line with the BU’s growth • Bigger picture planning for roadmaps and process improvements • Create a cohesive culture of openness, diversity, technical growth for the team members • Act with great resolve during testing times of critical issues, milestones, customer escalations and BU related internal changes • Exhibit strong leadership qualities to take the team forward towards growth and achieving the mission of the company • Exhibit great technical depth in the post silicon validation to take the right technical decisions for the team Individual requirements: • Highly skilled engineering professional with over 15 years of experience. • Solid experience in handling high performing, dynamic and a strong technical team. • Solid Experience and Knowledge in the post silicon validation of x86 IPs like Cores, Memory, RAS, HSIO. • Solid experience in handling the growth charter for growing teams and embrace changes with ease and grace • Adept in calling out risks while anticipating issues and coming up with appropriate mitigation plans • Experienced in working with the Enablement Manager and Leads, Program Managers, Product Managers, BIOS/FW Managers and other cross functional stakeholders and create a robust alignment setup while running execution. • Preferred experience working with cross-functional teams like DV/Silicon Designers/Pre-silicon/Platform/BIOS/FW/ SW. • Experience in High Speed I/Os like PCIe (preferably Gen4 and above), Memory (DDR4/DDR5.LPDDR4/LPDDR5), USB4.0/3.2/3.1, USB PD, USB Type C, Display interfaces and Ethernet and high-speed interconnects. • Experience in Power Management, Power Delivery, and Power Measurements. • Hands-on high speed and board measurement techniques in using high end equipment like Oscilloscopes, Logic Analyzers, Debugger tools, Raspberry PI, Network analyzers, etc. • Preferred experience with scripting using TCL, Python • Excellent communication, collaboration, articulation, upleveling to senior management and team playing skills. Key responsibilities: • Ensuring the team delivers error free and timely delivery of test cases and test reports, meeting or beating the program commitment • Synergize with the Pre-silicon and DV teams and other stakeholders for proper interception of milestones and risk callouts. • Actively participate in discussions with cross-functional teams in defining and refining test plans and guiding the team for the right path. • Be on top of all issues pertinent to Debug & Triage of any functional issues specific across the entire validation cycle • Drive meetings for issue closures and actively track schedules and milestone quality metrics • Ensure the Best in class Documentation and collateral delivery from the team. • Engage with the QA Validation and CAE teams for seamless handing over of test plans or reports, as relevant. #LI-NS2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.