Digital Design Engineer
Overview
1.Strong digital design capabilities with 5+ years of proven experience in IP and subsystem design for MPU & MCU based products
2. Proven experience in Security & Crypto IP and Subsystems development is preferable
3 Responsible to define micro architecture of digital IP and realizing digital design complying with specifications and area / performance requirements
4. Experience in optimizing designs for low power and implementation of security countermeasures meeting functional / performance requirements defined in high level security architecture
5. Good understanding of SoC functional & security architecture requirements, design integration requirements like CDC, RDC, Lint, DFT & low power for optimal IP design
6. Responsible to work with IP architects, Verification engineers to debug and resolve issues reported in IP/subsystem/SoC integration of IPs
7. Excellent communication skills, good team player to work with cross functional & global teams across the world with clear focus on delivering on time, quality and problem solving to come up with best-in-class Security IP designs,
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RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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