[2027 Internship] Standard Cell Library Design Engineer Intern
SingaporePosted Aug 24, 2026
Overview
[What you will do]
• Responsible for Standard Cell Library Characterization for leading edge process node (7nm/5nm/4nm/3nm), as the pioneer to setup design platform for MediaTek projects.
• Perform timing/ power/ constraint/ noise/ variation modeling, analysis and flow development for >15K logic circuit for one process node.
• Testchip design and Si data analysis flow development for advanced technology node (<7nm), including big data processing and visualization.
#LI-WC1
Apply on the employer's site
Original posting: careers.mediatek.com
RISC-V ecosystem
MediaTek Inc in the RISC-V ecosystem
RISC-V International: Strategic
We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.
- Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
- Listed on the landscape as a RISC-V International member
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