Product Engineering Architect (Computational Electromagnetics & Signal/Power Integrity)
Overview
- Added in 30 days
- 679
- At this company, still open
Skills named in this posting
- Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position responsibilities include:
• Drive key customer engagements in cooperation with local/international Field Applications team
• Interface with R&D team to drive and influence product development to fulfill customer requirements
• Manage beta programs, author documentation and track customer issues
• Travel, including international travel, may be required
Position requirements:
• It is preferred that candidates have 5+ years relevant industry experience with a MSEE -or- 7+ years experience with a BSEE.
• Good knowledge of IC design including knowledge of passive components such as inductors, capacitors and transformers
• Requires in-depth knowledge & industry experience in signal/power integrity and analysis
• Knowledge of 3D computational electromagnetics
• Experience with Perl, shell scripts, Matlab and the Linux command line environment
• Excellent oral and written communication skills
The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
Apply on the employer's site
Original posting: cadence.wd1.myworkdayjobs.com
RISC-V ecosystem
Cadence Design Systems, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
Cadence is a leading provider of EDA and semiconductor IP.
- EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
- Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows
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