Director, Advanced Power Silicon & Packaging Technology
Overview
Skills named in this posting
- UCIe / chiplets
Position Summary
The Director of Advanced Power Silicon & Packaging Technology leads the strategy, architecture, development, and deployment of next-generation power delivery technologies spanning silicon, package, and system integration. This role is responsible for driving innovation in power semiconductors, advanced packaging, and silicon-package-system co-optimization for AI, datacenter, networking, and high-performance computing platforms.
The director partners across silicon design, packaging, architecture, manufacturing, and product organizations to deliver breakthrough improvements in power efficiency, power density, performance, reliability, and total cost of ownership.
Key Responsibilities
Technology Strategy & Vision
• Define and execute the long-term roadmap for:Advanced power silicon technologiesAdvanced packaging and heterogeneous integrationChip-package-system co-designVertical power delivery solutions
• Identify disruptive technologies and assess strategic investment opportunities.
• Drive technology differentiation and competitive advantage.
Power Silicon Leadership
• Drive adoption of advanced semiconductor technologies including:GaN power devicesSiC technologiesAdvanced CMOS and BCD power processes
• Optimize power efficiency, die area, and reliability.
Advanced Packaging Leadership
• Establish packaging technology roadmaps for:2.5D and 3D packagingChiplet architecturesSilicon interposersFan-out packagingEmbedded power deliveryCo-packaged solutions
• Lead package electrical, thermal, and mechanical optimization.
• Drive package innovations enabling higher power density and lower power delivery losses.
Silicon-Package-System Co-Design
• Lead cross-functional initiatives to optimize:Power integrity (PI)Signal integrity (SI)Thermal performanceElectromigration reliabilityPower delivery network (PDN)
• Develop end-to-end power architectures from regulator to transistor.
Research & Innovation
• Lead advanced technology incubation and proof-of-concept programs.
• Build strategic partnerships with:Semiconductor foundriesOSAT partnersEDA vendorsUniversities and research institutions
• Create and manage intellectual property portfolios.
• Drive patent generation and technical publications.
Organizational Leadership
• Establish a culture of technical rigor, innovation, accountability, and execution excellence.
• Mentor senior technical leaders and develop organizational capability.
Required Qualifications
Education
• BS in Electrical Engineering, Physics, Materials Science, or related discipline.
• MS or PhD preferred.
Experience
• 15+ years of semiconductor and power technology experience.
• 6+ years leading technology, architecture, or engineering organizations.
• Proven success delivering innovative silicon and packaging technologies from concept through production.
Technical Expertise
Power Silicon
• Power semiconductor devices
• Power integrity analysisAdvanced Packaging
• Chiplet integration
• 2.5D/3D packaging
• Fan-out technologies
• Silicon interposers
• Package reliability and qualificationSystems Knowledge
• Power delivery networks
• Thermal management
• Manufacturing and supply chain considerations
Preferred Qualifications
• Expertise in:Vertical power deliveryBackside power distribution networksEmbedded voltage regulation
• Strong patent portfolio and industry recognition.
• Participation in IEEE, OCP, JEDEC, or semiconductor standards organizations.
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Original posting: nxp.wd3.myworkdayjobs.com
RISC-V ecosystem
NXP Semiconductors Netherlands B.V. in the RISC-V ecosystem
RISC-V International: Strategic
NXP Semiconductors NV is American Dutch semiconductor manufacturer with dual headquarters in Eindhoven, Netherlands and Austin, Texas.
- NXP is putting RISC-V cores into its mainstream products: a Linux-capable RISC-V core was reported to debut on an NXP i.MX SoC
- Broad MCU/applications-processor vendor tracked in RISC-V market analyses alongside other incumbents
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