Post-Doctoral Research Visit F/M Post-Doctoral Research Visit F/M - LLM, autotuning, SIMD - Joint IFPEN-Inria laboratory

Post-Doctoral Research Visit F/M Post-Doctoral Research Visit F/M - LLM, autotuning, SIMD - Joint IFPEN-Inria laboratory Download job offer in PDF format Contract type : Fixed-term contract Level of qualifications required : PhD or equivalent Fonction : Post-Doctoral Research Visit Context Numerical simulation is a strategic tool, useful for accelerating discoveries and innovations. The performance of simulators are thus of paramount importance to enable scalable high temporal resolution studies and to consider a wider range of scientific hypotheses. High Performance Computing (HPC) systems offer parallelism in multiple ways to address this computational demand: they are composed of many nodes, each with multiple cores (which may be heterogeneous or rely on Simultaneous Multi-Threading, SMT), using Single Instruction Multiple Data (SIMD) vectorization, with Graphics Processing Unit (GPU) accelerators. Both the software and hardware stacks present an array of diverse levers (tunable, such as process parallelism, SIMD, thread and data mapping for Non-Uniform Memory Access, burst buffers, frequency, or prefetching) to align applications (without code changes) with the unique characteristics of the hardware they run on. Interestingly, the recent code transformation capabilities of LLMs, assuming they can be verified, further offer a lever to tune applications through prompting describing code changes to apply. While tuning these levers provides gains, co-optimizing them together is key as their behaviors can synergize: thread and data mapping co-optimization is more efficient than a greedy approach, where threads and data are optimized in order (up to 1.7x speedup for userspace users) [4]. A full-scale optimization further achieves 1.8x speedup and 6x energy savings [5], demonstrating that it is of paramount importance for exascale sustainability. Exploring such parameter optimizations is the core task of this postdoc position: it leverages statistical/AI methods to exploit patterns, transform codes, and focus the search to avoid local optima. To address this challenge, we rely on an ongoing collaboration between Inria TADaaM [1], IFPEN [2], and LIP6 [3] (Sorbonne University). LiP6 brings expertise in SIMD code transformation, Inria in LLM-based agentic workflows for HPC applications, and IFPEN in full-stack performance tuning and representative real-world simulation workloads. Assignment This work aims to express diverse OpenMP and SIMD code transformations and assess their correctness with respect to the original code. We will rely on LLMs (e.g., llama, deepseek, queen coder) and an agentic framework to apply such code transformations [7]. We start by defining a set of prompts (with chain of thought or prompting) to apply simple source code transformations (e.g., loop interchange, unroll, structure change). These transformations are conditioned by the used LLM: two LLMs might not produce the same transformation on the same code with the same prompt. We will explore existing LLMs and select prompts across already explored transformations: OpenMP and SIMD. Then, we will diversify the transformations by incrementally complexifying them along with the target codes. A key insight of the proposed work is the synergistic relationship with LLMs: as their capabilities grow, they enable more aggressive and valid transformations across diverse codebases. However, LLMs alone are unlikely to maximize performance efficiency, as their training data reflects average hardware rather than system-specific conditions. To overcome this, we will enhance the characterization of each transformation with its impact over the rest of the stack thanks to CORHPEX [7]. Finally, we propose to employ SOTA verification methods (e.g., checkpoint-restart CaRV, alive symbolic analysis) along with unit tests (e.g., as illustrated by the MIPP infrastructure [8]) to assess the semantic equivalence between the original and the LLM transformed program. We hope that the proposed methodology could be transformed for other programming models and architectures. Reference [1] https://team.inria.fr/tadaam/ [2] https://www.ifpenergiesnouvelles.fr/ [3] https://www.lip6.fr/ [4] Efficient thread/page/parallelism autotuning for NUMA systems. M Popov, A Jimborean, D Black-Schaffer. ICS 2019 [5] Optimizing performance and energy across problem sizes through a search space exploration and machine learning. L Scravaglieri, M Popov, L Lima Pilla, A Guermouche, O Aumage, E Saillard. JPDC 2023 [6] Compiler, Runtime, and Hardware Parameters Design Space Exploration. L Scravaglieri, A Anciaux-Sedrakian, O Aumage, T Guignon, M Popov. IPDPS 2025 [7] Llm-vectorizer: Llm-based verified loop vectorizer. J Taneja, A Laird, C Yan, M Musuvathi, SK Lahiri. CGO 2025 [8] MIPP: A Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard. A Cassagne, O Aumage, D Barthou, C Leroux, C Jégo. WPMVP 2018. Main activities We identify the following activities: 1. Build a basic SIMD code transformation workflow with LLMs. 2. Build an infrastructure to assess their semantic equivalence with respect to the original code. We consider checkpoint-restart CaRV or alive symbolic analysis techniques. 3. Expand the scope of codes and transformations. A potential lead is the optimization manuals of the target hardware. 4. Contextulaize the impact of source code transformation with respect to the rest of the computing stack. We can rely on CORHPEX to navigate the resulting optimization space. Skills The profile we are looking for this job is someone who communicates well in English and has initiative and autonomy to conduct this research project while tackling the diverse related technical challenges. The person should have experience in AI techniques, HPC, autotuning, performance evaluation and statistical methods. Benefits package • Subsidized meals • Partial reimbursement of public transport costs • Leave: 7 weeks of annual leave + 10 extra days off due to RTT (statutory reduction in working hours) + possibility of exceptional leave (sick children, moving home, etc.) • Possibility of teleworking (after 6 months of employment) and flexible organization of working hours • Professional equipment available (videoconferencing, loan of computer equipment, etc.) • Social, cultural and sports events and activities • Access to vocational training • Social security coverage Apply for this position Share • Facebook • Linkedin • Twitter • Email General Information • Theme/Domain : Distributed and High Performance Computing System & Networks (BAP E) • Town/city : Talence • Inria Center : Centre Inria de l'université de Bordeaux • Starting date : 2027-01-01 • Duration of contract : 12 months • Deadline to apply : 2026-11-30 Warning : you must enter your e-mail address in order to save your application to Inria. Applications must be submitted online on the Inria website. Processing of applications sent from other channels is not guaranteed. Instruction to apply Defence Security : This position is likely to be situated in a restricted area (ZRR), as defined in Decree No. 2011-1425 relating to the protection of national scientific and technical potential (PPST).Authorisation to enter an area is granted by the director of the unit, following a favourable Ministerial decision, as defined in the decree of 3 July 2012 relating to the PPST. An unfavourable Ministerial decision in respect of a position situated in a ZRR would result in the cancellation of the appointment. Recruitment Policy : As part of its diversity policy, all Inria positions are accessible to people with disabilities. Contacts • Inria Team : TADAAM • Recruiter : Popov Mihail / mihail.popov@inria.fr About Inria Inria, the French national institute for research in digital science and technology, supports the French government in national research and innovation strategies in the digital field, acting as Digital Programs Agency. Inria leads over 300 research and innovation projects with its 3,500 scientists, engineers, and support staff, in partnership with universities and the digital ecosystem (businesses, entrepreneurs, and public stakeholders). Together, we explore strategic fields such as artificial intelligence, cybersecurity, quantum computing, cloud technologies, digital transformation in healthcare, digital twins, and digital technologies for defence. We develop practical solutions such as software, tech startups, partnerships with national companies, and cutting-edge training programmes. Our goal is to drive scientific, technological, and industrial excellence to ensure France’s digital sovereignty.