TPC Arch Intern, GPU SM - 2027
Overview
- Added in 30 days
- 658
- At this company, still open
Skills named in this posting
- C++
We are looking for a GPU C++ Modeling Engineer intern – Performance/Functional Modeling, Validation and Analysis of Shader. TPC arch team is a fast-growing team which welcomes all level engineers to join. Our aim is to explore and design better architecture of GPU which will help AI program run efficiently and rendering in games become faster and more realistic. TPC is core of GPU. It includes several units for schedule, computation and cache. You will work closely with the US team, including test writing, function and performance implementation of kinds of features and study of new features.
What you’ll be doing:
• Investigate and propose architecture ideas based on quantitative study of existing and projected SM architecture.
• Develop performance and functional simulation models.
• Develop performance and functional testplan and tests to validate new SM architectural and features.
• Test and debug on simulators, RTL and real silicon.
What we need to see:
• Good mastery of C++ language.
• Experience of performance/functional modelling, profiling and analysis is a plus.
• Practice with trace-driven and execution-driven simulation model development is a plus.
• Pursuing BSEE or BSCSE. MS or PhD is a plus.
Ways to stand out from the crowd:
• Candidates with GPU shader unit design, microprocessor design, and CPU/GPU performance analysis experience are preferred.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people on the planet working for us. If you're creative and autonomous, we want to hear from you!
Apply on the employer's site
Original posting: jobs.nvidia.com
RISC-V ecosystem
NVIDIA Corporation in the RISC-V ecosystem
RISC-V International: Premier Board
Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.
- NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
- Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
- Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage
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