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Staff Engineer Design

Infineon Technologies AG

Bangalore BTPRTL / HDLPhysical designSoC / ASICPosted Oct 28, 2026
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Skills named in this posting

  • Low-power design (UPF)
  • Python
  • Tcl
• Develop and implement innovative digital design flows, focusing on the synthesis, LEC and CLP runs and physical design aspects. • Translate high-level design requirements into detailed flow specifications, utilizing state-of-the-art EDA tools and flows to ensure efficient timing closure, and physical sign-off • Work independently across various phases of the RTL2GDS flow, with a focus on synthesis, equivalence checking, and physical implementation, to ensure highly automated, safe, stable, easy-to-use, customizable and effective digital design flows • Participate in an expert network to drive innovation, methodology, and flow topics in SoC synthesis, UPF, physical design and top-level timing closure, contributing to the development of next-generation SoC designs Your role Key responsibilities in your new role • Develop and implement innovative digital design flows, focusing on the synthesis, LEC and CLP runs and physical design aspects. • Translate high-level design requirements into detailed flow specifications, utilizing state-of-the-art EDA tools and flows to ensure efficient timing closure, and physical sign-off • Work independently across various phases of the RTL2GDS flow, with a focus on synthesis, equivalence checking, and physical implementation, to ensure highly automated, safe, stable, easy-to-use, customizable and effective digital design flows • Participate in an expert network to drive innovation, methodology, and flow topics in SoC synthesis, UPF, physical design and top-level timing closure, contributing to the development of next-generation SoC designs Your profile Qualifications and skills to help you succeed • A degree in Electrical Engineering, Microelectronics, or a similar field • At least 5-8 years of working experience in Synthesis and Physical Design handling highly complex SoCs, with sound experience in Synthesis, LEC and UPF/CLP Timing Closure. • Very good knowledge in Synopsys and Cadence Toolset in the RTL2GDS domain • Proven track record in developing digital design methodologies • Know-how in technical leadership in physical design projects • Sound programming skills and knowledge in scripting languages like Tcl or Python • Basic experience in RTL coding • Understanding of Functional Safety and Agile Development Methods like Kanban Scrum XP. Test Driven Development knowledge would be an advantage • Excellent written and spoken English #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Vidhi Thakkar

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Original posting: jobs.infineon.com

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RISC-V ecosystem

Infineon Technologies AG in the RISC-V ecosystem

RISC-V International: Premier Board

Infineon Technologies AG is a German semiconductor manufacturer founded in 1999, when the semiconductor operations of the parent company Siemens AG were spun off.

  • Brought RISC-V to automotive: first to announce an automotive RISC-V microcontroller family
  • Showed a virtual prototype/virtual automotive RISC-V chip with Synopsys for early software development

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