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Senior Design Engineer - Die-to-Die Interface

MediaTek Inc

TaipeiFirmwarePhysical designPosted Dec 9, 2025
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Skills named in this posting

  • UCIe / chiplets
1. Develop Die-to-die and UCIe digital IP for HPC SOC. 2. Integration of D2D controller and PHY to timing closure and DFT. 3. Define interface specifications, creating comprehensive verification plans, and support integration and physical implementation. 4. Work closely with multiple teams such as mixed mode designers and Firmware engineers. #LI-LYNN

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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