Senior Networking IC Test Engineering Program Manager
Overview
- Added in 30 days
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- At this company, still open
The Networking IC Test Engineering Program Manager will own the technical release planning and execution infrastructure for test programs across all Networking products. The role will drive NPI test readiness, TRD (Test Readiness Dependencies) to test mapping, release dashboarding, fuse approval tracking, ASIC availability coordination, and convergence between test platforms. This person should have enough technical depth to identify real engineering risks, not only schedule delays, and should create the structure that allows test engineers to focus on test content, quality, coverage, and debug.
What you'll be doing:
• Own IC ATE test program release planning across NVIDIA Networking products, including milestones, dependencies, risks, and release criteria.
• Build and maintain a test program release dashboard covering readiness, blockers, release status, TRD mapping, coverage gaps, and ownership.
• Define and drive the Test Engineering readiness plan for NPI products from early development through production release.
• Coordinate TRD mapping to test content, ensuring requirements are tracked, covered, reviewed, and reflected in release decisions.
• Create the operating model for test program releases, including release gates, checklist ownership, approval flow, and escalation paths.
• Partner closely with test engineers, product engineering, silicon/platform teams, operations, and release stakeholders to identify technical risks early and structure resolution plans.
• Standardize release documentation, training materials, handoff packages, and post-release lessons learned, and align communication across Confluence pages and stakeholder updates.
• Improve visibility and efficiency so test engineers can spend more time on test quality, coverage, debug, and optimization.
What we need to see:
• Strong technical background in semiconductor test engineering, product engineering, validation, or TE program development.
• Bachelors degree or equivalent experience.
• 5+ years' experience with NPI execution, production release processes, test readiness, or silicon bring-up flows.
• Familiarity with test program structure, test limits, coverage, characterization, release criteria, and manufacturing constraints.
• Program management skills: planning, dependency tracking, risk management, stakeholder alignment, and execution discipline.
• Ability to translate technical engineering status into clear release decisions, dashboards, and management-level communication.
• Strong ownership mindset; able to drive structure in ambiguous, cross-functional environments.
• Excellent communication skills, including Confluence documentation, dashboard definition, and training material creation.
• Proven Leadership / Managerial / Program management experience
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Original posting: jobs.nvidia.com
RISC-V ecosystem
NVIDIA Corporation in the RISC-V ecosystem
RISC-V International: Premier Board
Founded in 1993, NVIDIA is an AI computing company. The company is headquartered in Santa Clara, California.
- NVIDIA is bringing CUDA platform support to RISC-V, i.e. allowing a RISC-V CPU to host CUDA GPU applications
- Publicly credited the RVA23 profile as the enabler: "We wouldn't have considered porting CUDA to RISC-V without it"
- Active in RISC-V International profile/standards work and a frequent presence in RISC-V ecosystem coverage
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