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Layout Designer

Cadence Design Systems, Inc.

NanjingPosted Sep 21, 2026
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Cadence Design Systems, Inc.
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 工作内容： - 负责模拟电路的版图设计、版图验证； - 分析Foundry所提供的工艺流程和设计规则，理解所用工艺器件的平面和纵向结构； - 与设计工程师充分沟通，确保完全理解设计对版图的要求。 要求： 微电子，半导体物理等本科及以上学历，有较好的集成电路工艺基础和模拟电路基础。 熟练使用Cadence virtuoso进行版图设计。 能主动积极完成各种版图设计任务。 很好的沟通能力和团队合作能力。 We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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