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Lead Design Engineer

Cadence Design Systems, Inc.

BANGALORERTL / HDLPosted Sep 21, 2026
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Overview

Cadence Design Systems, Inc.
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Skills named in this posting

  • Verilog
  • PCIe
  • UCIe / chiplets
  • USB
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 1. Proficient in Verilog coding and RTL design, data path designs, 2. Knowledge of RTL checks ex- LINT, SDC, CDC 3. Familiar with synthesis flow and timing constraints 4. Experience in writing Verilog testbench and running simulations. 5. Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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