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Senior substrate layout engineer

MediaTek Inc

HsinChuPosted Jan 1, 2025
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1. Advanced Package BGA substrate layout and PV (DRC; LVL; LVS) check 2. 2.5D IC (CoWoS_S; CoWoS_L; CoWoS_R; EMIB) RDL & Sbustrate routing and PV check. 3. Co-work with package Design engineer to achive PKG design requirement and goal. 4. New PKG layout methodology Study and development. 5. New layout & PV EDA tool evaluation #LI-JK1

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Original posting: careers.mediatek.com

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RISC-V ecosystem

MediaTek Inc in the RISC-V ecosystem

RISC-V International: Strategic

We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.

  • Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
  • Listed on the landscape as a RISC-V International member

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