Front-end Design/Verification Engineer【1 year contractor】
Overview
1.作為glitch flow and methodology 與DV EDA tool(包含 AI EDA) 窗口, 協助User report issues to EDA tool vendors, 解決Tool 使用相關問題
2.協助開發glitch methodology與維護glitch tool etc. 相關 EDA(包含 AI EDA) and DV script, flow.
3. 協助開發自動化程式或Agentic automation flow
4.Design verification的執行與資料收集分析
5.Documentation
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Original posting: careers.mediatek.com
RISC-V ecosystem
MediaTek Inc in the RISC-V ecosystem
RISC-V International: Strategic
We make semiconductor technology for #Smartphone, #IoT, #Network as well as TV, Tablet, Blu-ray & many other devices.
- Named in coverage of RISE, the Linux Foundation Europe RISC-V Software Ecosystem project, and RISC-V edge-AI market analysis
- Listed on the landscape as a RISC-V International member
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