Technical Manager of Digital Design

1. 4/5/6G modem hardware architecture and digital circuit design task 2. Define hardware architecture of a digital IP/system 3. Include Clock, Bus (AXI/APB/NOC/…), Async design, high speed IF, new IP for sub-sys design topic 4. IP and Subsys digital design and PPA optimization 5. Subsys integration from RTL to gate level including timing closure and testability 6. Design methodology and integration flow improvement #LI-LL1