Principal Product Engineer - DIP
Overview
- Added in 30 days
- 679
- At this company, still open
Skills named in this posting
- SystemVerilog
- Verilog
- UVM
- PCIe
- USB
- I2C / UART
- Python
- Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key Responsibilities
• Technical Support & Case Management: Act as the primary interface for technical issues, driving resolution for complex subsystem application or implementation problems. This includes monitoring case management systems like Salesforce (SFDC) and Jira.
• IP Integration & Validation: Support Pre-Silicon integration, post-silicon bring-up, and verification of PHY and controller SoC integration. Conduct RTL and gate-level simulations to ensure functionality and assist with timing closure.
• Customer Engagement: Proactively engage with customers to identify potential issues, prioritize critical technical problems, and manage escalations, ensuring high satisfaction.
• Technical Leadership: Develop comprehensive knowledge bases, document product limitations, and provide feedback to internal Product Engineering and R&D teams for continuous improvement.
• Guidance & Training: Create and deliver technical training, seminars, and documentation to support customer success and adoption of best practices.
Required Qualifications
• Experience: Requires 8+ years of experience in verification and design, specifically with IP development.
• Technical Expertise: Strong background in digital electronics, Verilog/SystemVerilog, and UVM methodology.
• Protocol Knowledge: Practical knowledge of memory or communication interface IP protocols such as MIPI (CSI2/DSI/I3C/PHY), PCI Express, DDR, LPDDR, HBM, or USB.
• Skills: Excellent debugging skills, ability to handle complex problems, and proficiency in scripting languages (TCL, Perl, or Python).
• Education: Bachelor’s or Master’s in Electronics or Electrical Engineering.
Preferred Skills
• Experience with Cadence-specific tools, EDA workflows, or similar IP design platforms.
Core Competencies
• Strong communication and presentation skills, capable of influencing both internal teams and customer stakeholders.
• Proactive and collaborative approach, able to work across global, cross-functional teams.
• Strategic thinking to drive product roadmap improvements based on user feedback.
• Fluent spoken English
We’re doing work that matters. Help us solve what others can’t.
Apply on the employer's site
Original posting: cadence.wd1.myworkdayjobs.com
RISC-V ecosystem
Cadence Design Systems, Inc. in the RISC-V ecosystem
RISC-V International: Strategic
Cadence is a leading provider of EDA and semiconductor IP.
- EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
- Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows
Same employer
More roles at Cadence Design Systems, Inc.
Sr Systems Engineer
Cadence Design Systems, Inc.
SHANGHAICompilersKernel / LinuxOct 28, 2026Sr Systems Engineer
Cadence Design Systems, Inc.
SHANGHAICompilersKernel / LinuxOct 28, 2026Sr Credit & Collections Analyst
Cadence Design Systems, Inc.
SHANGHAIOct 28, 2026Sr Principal Project Manager - AE
Cadence Design Systems, Inc.
SHANGHAIRTL / HDLVerificationSoC / ASICOct 28, 2026IT -Staff Systems Engineer - VM
Cadence Design Systems, Inc.
SHANGHAI 07Oct 28, 2026Software Engineer II: Hardware Job Scheduler R&D
Cadence Design Systems, Inc.
BELO HORIZONTERTL / HDLPhysical designSoC / ASICOct 28, 2026