Principal Physical Design Engineer

Date posted 10/27/2026 Category Engineering Hire Type Employee Job ID 19508 Date Posted 10/27/2026 We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent 15+ years in the trenches of physical design, and you know that the difference between a chip that tapes out and one that stalls in timing closure is usually a methodology decision made six months earlier. You are the engineer who catches that decision before it becomes a crisis. You have worked directly with customers enough to know that the best solution is not always the most elegant one, it is the one that actually works in their flow, with their constraints, on their timeline. You think in terms of PPA, runtime, and design closure, but you also think about the engineer who will inherit this methodology next quarter. Automation is not a buzzword for you, it is how you multiply impact. You write Python and Tcl not because it is in the job description, but because waiting for someone else to build the tool you need is not an option. You do not just solve problems, you translate customer pain into product requirements that R&D can act on. You have sat in rooms with foundry partners, product teams, and customer architects, and walked out with a plan that everyone believes in. At Synopsys, you will work on implementation challenges that define what is possible at 5nm and below, with a team that takes this work as seriously as you do. What You'll Be Doing • Lead physical design engagements for strategic semiconductor customers working on advanced-node designs, from floorplanning through signoff • Develop and optimize RTL-to-GDSII methodologies that improve PPA, reduce runtime, and accelerate design closure for production tapeouts • Build automation frameworks using Python and Tcl that solve real productivity bottlenecks in placement, CTS, routing, and timing closure workflows • Collaborate with Product Engineering and global R&D teams to validate new Synopsys implementation technologies and translate customer feedback into product requirements • Drive technical evaluations and benchmarking programs that demonstrate measurable improvements in customer design metrics • Support advanced-node enablement and DTCO initiatives in partnership with foundries and customer design teams • Mentor engineers across the Korea team and contribute to technical leadership on methodology development and customer engagement strategy The Impact You Will Have • Enable successful tapeouts for leading semiconductor companies working on AI accelerators, mobile SoCs, HPC, and memory designs at 5nm and below • Deliver methodology improvements that directly reduce customer design cycle time and improve power, performance, and area outcomes • Influence the product roadmap for Synopsys implementation tools based on real customer needs and advanced-node challenges you identify • Accelerate engineering productivity across customer teams through automation solutions that eliminate manual bottlenecks in physical design flows • Build long-term technical partnerships with strategic customers that drive adoption of Synopsys technologies and expand deployment across their design organizations • Shape the future of physical design methodologies by integrating emerging technologies like AI-assisted workflows into production-ready solutions • Grow technical capability within the Korea team through mentorship and knowledge sharing that elevates the entire organization What You'll Need • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field • 15+ years of hands-on experience in semiconductor physical design, implementation methodologies, or EDA development • Deep expertise across the RTL-to-GDSII flow including floorplanning, placement optimization, clock tree synthesis, routing, timing closure, power optimization, and physical verification • Strong proficiency in Python and Tcl for building automation frameworks and productivity tools • Demonstrated experience working directly with semiconductor customers to solve complex implementation challenges and deploy methodologies in production environments • Fluency in Korean and English with the ability to lead technical discussions, present to executive stakeholders, and document methodologies in both languages • Experience with Fusion Compiler, IC Compiler II, PrimeTime, or equivalent implementation and signoff tools is a strong plus Who You Are • You can walk into a customer meeting, listen to a design challenge, and sketch out a methodology solution on the whiteboard that the team believes will work before you leave the room • You write automation that other engineers actually use because you understand the difference between a script that works once and a tool that scales across a team • You push back when a product feature does not solve the real customer problem, and you do it in a way that helps R&D build something better • You debug timing closure issues, congestion hotspots, and power violations with the same rigor whether it is your design or a customer's, because you care about getting it right • You mentor engineers by showing them how you think through a problem, not just handing them the answer • You stay current on advanced-node challenges, foundry roadmaps, and emerging technologies because you know that what worked at 7nm will not be enough at 3nm The Team You'll Be Part Of You will be part of a high-performing Physical Design Team supporting some of the world's most advanced semiconductor companies. The team works closely with strategic customers, Product Engineering, and global R&D organizations to solve complex implementation challenges, enable advanced-node designs, and drive successful adoption of Synopsys technologies. Our team combines deep physical design expertise with strong customer engagement and a focus on methodology development, helping shape future implementation flows while delivering measurable value to customers. We value technical excellence, collaboration, ownership, and continuous learning, creating an environment where engineers can grow, lead complex engagements, and make a lasting impact on the semiconductor industry. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #TPG At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.