SystemC Modeling Designer

1. Responsible for SystemC platform modeling and simulation of bus system in including functional modeling and performance analysis. 2. Develop reusable and extensible SystemC models according to system specifications to support system architecture planning and verification. 3. Participate in behavioral and high-level abstraction (TLM, Transaction-Level Modeling) model design and verification for SoC (System-on-Chip) and IPs. 4. Collaborate with hardware, software, and verification teams for flow integration, co-debugging, and problem analysis. 5. Prepare technical documents and model descriptions to support design, verification, and customer applications. #LI-LL1