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Software Intern

Cadence Design Systems, Inc.

SAN JOSEPosted Sep 21, 2026
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Skills named in this posting

  • C
  • C++
  • Python
  • Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. We are looking for a highly motivated software intern to work on the research and development using the state-of-the-art machine learning technologies in the area of on-chip in parasitic modeling, in a fast-paced, small team environment. Position Requirements: • Fast learner, highly motivated with good communication skills to solve extremely challenging technical problems, in a start-up like environment. • Strong algorithm background, programming skills and implementation for the processing of large amount of data • Knowledge and experience with state-of-the-art machine learning technologies, parasitic modeling is a big plus • Experience in C/C++ coding, with any of the following background: CS, Mathematics, Physics or EE. • Knowledge in UNIX shell and scripting language like Python, Perl • ML knowledge is a plus • Minimum: Master or PhD graduate candidates ​The hourly range for California is $31.63 to $58.75 per hour. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Please note that the hourly range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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