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Principal Product Engineer

Cadence Design Systems, Inc.

ZHUBEI 01Physical designPosted Oct 1, 2026
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Skills named in this posting

  • Place and route
  • Python
  • Perl
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description • Product Engineer for Integrity 3D-IC • Developing and integrating various EDA tools and engines into the consolidated 3D-IC platform. • Working closely with R&D group to develop, integrate and enhance EDA solutions, including 3D-IC system planning, implementation, and analysis/verification. • Collaborating with the field teams for customer engagement and providing technical support and guidance. • Communicating and coordinating with multiple R&D groups and field teams to enable EDA solutions to customers. Position Requirements • BS degree with 7+ years or MS degree and 5+ years of engineering work experience in the semiconductor industry. • Experience in physical implementation, place-and-route, and signoff tools. Familiar with Cadence digital flows and advanced packaging design with Allegro Package Designer. • Knowledge and experience in 3D-IC system planning, implementation, analysis, and signoff flows is a plus • Hands-on experience in scripting languages, such as TCL, Perl, YAML, and Python. • Good trouble-shooting and technical documentation skills. A self-motivated, proactive leaner and team player, with excellent communication skills and a customer-oriented attitude. We’re doing work that matters. Help us solve what others can’t.

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Original posting: cadence.wd1.myworkdayjobs.com

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RISC-V ecosystem

Cadence Design Systems, Inc. in the RISC-V ecosystem

RISC-V International: Strategic

Cadence is a leading provider of EDA and semiconductor IP.

  • EDA vendor active in RISC-V: supported NSITEXE (with Imperas) in developing RISC-V vector processor IP for automotive AI
  • Publishes RISC-V ecosystem commentary ("The State of the RISC-V Union", Paul McLellan) and RISC-V verification/emulation flows

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