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133 results · page 6 of 6 · dates: UTC

Principal Design Verification Engineer – CPU Core Frontend
SiFive
2026-07-31
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-07-31
Senior Staff Software Quality Assurance Engineer
SiFive
2026-07-31
Hsinchu, TaiwanRISC-VRTL / HDLCompilersFirmware2026-07-31
Datacenter System Software Architect
SiFive
2026-07-31
Santa Clara, CARISC-VRTL / HDLKernel / LinuxFirmware2026-07-31
Confidential Computing Software Architect
SiFive
2026-07-31
Santa Clara, California, United StatesRISC-VRTL / HDLVerificationFirmware2026-07-31
Linux Kernel Architect
SiFive
2026-07-31
Santa Clara, California, United StatesRISC-VRTL / HDLKernel / LinuxSoC / ASIC2026-07-31
CPU Power-Management Design Engineer
SiFive
2026-07-31
Santa Clara, California, United StatesRISC-VRTL / HDLVerificationPhysical design2026-07-31
Staff Engineer - CPU Verification
SiFive
2026-07-31
Hyderabad, IndiaRISC-VRTL / HDLVerificationSoC / ASIC2026-07-31
Senior Customer Release Engineer
SiFive
2026-07-31
Bengaluru, Karnataka, IndiaRISC-VRTL / HDLVerificationSoC / ASIC2026-07-31