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3,311 results · page 19 of 133 · dates: UTC

Ingénieur logiciel design SoC Senior H/F / Senior SoC design Software Engineer
Arteris IP
2026-10-20
RTL / HDLSoC / ASIC2026-10-20
Ingénieur logiciel en conception SoC H/F / SoC design software engineer
Arteris IP
2026-10-20
Paris, FranceRTL / HDLVerificationSoC / ASIC2026-10-20
Ingénieur Staff Produit / Staff Product Engineer F/H
Arteris IP
2026-10-20
Montigny le Bretonneux, ParisRTL / HDLPhysical designSoC / ASIC2026-10-20
Principal Design Verification Engineer
Arteris IP
2026-10-20
Biot, FranceRTL / HDLVerificationSoC / ASIC2026-10-20
Principal Hardware Verification Engineer / Ingénieur Principal vérification matériel H/F
Arteris IP
2026-10-20
Biot, FranceRTL / HDLVerificationSoC / ASIC2026-10-20
Senior FPGA Engineer H/F
Arteris IP
2026-10-20
Biot, FranceRTL / HDLVerificationCompilersSoC / ASIC2026-10-20
Senior Manager Field Application Engineering
Arteris IP
2026-10-20
Campbell, CaliforniaRISC-VRTL / HDLPhysical designSoC / ASIC2026-10-20
Senior Staff Design Verification Engineer F/H
Arteris IP
2026-10-20
Biot, FranceRTL / HDLVerificationSoC / ASICSecurity2026-10-20
Technical Domain Engineer
Arteris IP
2026-10-20
Kraków, PolandRISC-VRTL / HDLVerificationSoC / ASIC2026-10-20
Mid-Level SoC Design Engineer
Azimuth AI
2026-10-20
Hyderabad, IndiaRTL / HDLSoC / ASIC2026-10-20
Design Verification Manager
Andes Technology Corporation
2026-10-20
RISC-VRTL / HDLVerification2026-10-20
Design Verification Engineer
Andes Technology Corporation
2026-10-20
RISC-VRTL / HDLVerification2026-10-20
Formal Engineer
Andes Technology Corporation
2026-10-20
RISC-VRTL / HDLVerification2026-10-20
Senior CPU Microarchitecture & Logic Design Engineer, Execution Unit
Ahead Computing
2026-10-20
Portland, OR, US; Austin, TX, USRTL / HDLPhysical design2026-10-20
Staff Physical Design Engineer – CPU PPA Optimization
Ahead Computing
2026-10-20
Austin, TX, US; Portland, OR, USRTL / HDLPhysical design2026-10-20
Performance and Power (PnP) Modeling Engineer
Ahead Computing
2026-10-20
Guadalajara, MXRTL / HDL2026-10-20
Staff Applications Engineer, Fusion Compiler
Synopsys
2026-10-20
MalaysiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-20
Microarchitect and RTL Designer - Compute
Matx
2026-10-19
Mountain View (HQ) or RemoteRemoteRTL / HDLPhysical design2026-10-19
Design for Test (DFT) Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLPhysical designSoC / ASIC2026-10-19
CAD & Flow Methodology Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLPhysical design2026-10-19
Emulation & FPGA Prototyping Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-19
Low-Power Design Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLVerificationPhysical designSoC / ASIC2026-10-19
Synthesis & Static Timing Analysis (STA) Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLCompilersPhysical design2026-10-19
RTL Design Engineer
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLVerificationPhysical design2026-10-19
Chip Architect
VoltAI
2026-10-19
Palo Alto OfficeRTL / HDLPhysical designSoC / ASIC2026-10-19