Timing Constraint Development Engineer
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLPhysical designSoC / ASIC2026-10-07
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PD CAD Engineer
Advanced Micro Devices (AMD)
Hyderabad, IndiaPhysical design2026-10-07MCU Power Architect
NXP Semiconductors Netherlands B.V.
CataniaPhysical design2026-10-07Senior Analog IC Layout Engineer - MCU
NXP Semiconductors Netherlands B.V.
CataniaPhysical design2026-10-07Junior Analog Design Engineer
NXP Semiconductors Netherlands B.V.
CataniaPhysical design2026-10-07Group Director, Design Engineering - Front End
Cadence Design Systems, Inc.
AUSTINRTL / HDLVerificationFirmwarePhysical design2026-10-07CST Application Engineer Intern - Silicon
Cadence Design Systems, Inc.
SAN JOSEFirmwarePhysical design2026-10-07Product Validation II: Hardware Job Scheduler Quality Assurance (QA)
Cadence Design Systems, Inc.
BELO HORIZONTERTL / HDLPhysical designSoC / ASIC2026-10-07Design Engineer
Lattice Semiconductor Corporation
Penang, MalaysiaRISC-VFirmwarePhysical designFPGA2026-10-07Director of Systems Engineering
Analog Devices, Inc.
US, CA, Milpitas, TasmanFirmwarePhysical design2026-10-07NPU Design implementation (Synthesis) Principal/Manager
Qualcomm Technologies, Inc.
Bangalore, India, Hyderabad, Telangāna, IndiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-07Front-End Implementation Engineer (Staff) (Timing & Synthesis)- Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLVerificationPhysical designSoC / ASIC2026-10-07CPU SRAM Design Engineer
Qualcomm Technologies, Inc.
Bangalore, IndiaVerificationPhysical design2026-10-07RISC-V System IP Design Lead
Qualcomm Technologies, Inc.
Chennai, Tamil Nādu, IndiaRISC-VRTL / HDLVerificationPhysical design2026-10-07Director , Engineering (GPU Physical Design)
Qualcomm Technologies, Inc.
Bangalore, IndiaVerificationPhysical designSoC / ASIC2026-10-07Senior Physical Design AI Engineer
NVIDIA Corporation
India, BengaluruRTL / HDLPhysical design2026-10-07Senior Physical Verification Engineer
NVIDIA Corporation
India, BengaluruVerificationPhysical design2026-10-07Senior Full-Chip RTL Integration Engineer
NVIDIA Corporation
US, CA, Santa Clara, US, TX, AustinRTL / HDLVerificationPhysical designSoC / ASIC2026-10-07Senior VLSI Methodology Engineer
NVIDIA Corporation
US, CA, Santa ClaraCompilersPhysical design2026-10-07Mask Layout Designer, Staff - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandPhysical design2026-10-07Hardware Verification, Engineer at Qualcomm Interconnect Technology Center (QITC) - France
Qualcomm Technologies, Inc.
Guyancourt, Yvelines, FranceRTL / HDLVerificationPhysical designSoC / ASIC2026-10-07FPGA Design & Firmware Engineer, Staff
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLCompilersKernel / LinuxFirmware2026-10-07FPGA Design & Firmware Engineer, Staff
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLCompilersKernel / LinuxFirmware2026-10-07EDA/CAD Software Engineer, Staff
Qualcomm Technologies, Inc.
San Diego, California, United States of America, Austin, Texas, United States of America, Folsom, California, United States of America, Hillsboro, Oregon, United States of America, Markham, Ontario, Canada, Santa Clara, California, United States of AmericaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-07Next Gen, High-Speed, Memory and Cache Controller Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-07
