Sr DFT/ATPG Engineer–Mixed-Signal IP
Advanced Micro Devices (AMD)
Fort Collins, ColoradoPhysical designSoC / ASIC2026-10-02
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2,037 results · page 26 of 82 · dates: UTC
PD PNR Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLCompilersPhysical designSoC / ASIC2026-10-02Lead STA / Timing analysis Design Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLCompilersFirmwarePhysical design2026-10-02Principal Physical Design Engineer
Microsoft Corporation
United States, Washington, Redmond, United States, California, Mountain View, United States, California, Santa Clara, United States, Oregon, Hillsboro, United States, Texas, Austin, United States, Idaho, Boise, United States, North Carolina, RaleighCompilersPhysical designSoC / ASIC2026-10-02Sr Analog Design Engineer
NXP Semiconductors Netherlands B.V.
CataniaPhysical design2026-10-02Principal Analog IC Layout Engineer
NXP Semiconductors Netherlands B.V.
NijmegenPhysical design2026-10-02Next Generation SoC Integration Solution Lead
NXP Semiconductors Netherlands B.V.
NoidaRTL / HDLCompilersFirmwarePhysical design2026-10-02Processor Core Logic Design/Architect
Cadence Design Systems, Inc.
AUSTINPhysical design2026-10-02Principal Software Engineer
Cadence Design Systems, Inc.
HSINCHUPhysical design2026-10-02Technical Program Manager – DFX Productization
NVIDIA Corporation
US, CA, Santa ClaraPhysical designSoC / ASIC2026-10-02Physical Design Engineer
Qualcomm Technologies, Inc.
Tijuana, Baja California, MexicoRTL / HDLPhysical designSoC / ASIC2026-10-02Modem Software Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaCompilersKernel / LinuxFirmwarePhysical design2026-10-02DFT-Staff Engineer
Qualcomm Technologies, Inc.
Austin, Texas, United States of AmericaRTL / HDLVerificationPhysical designSoC / ASIC2026-10-02- Yongin-si, South KoreaPhysical designSecurity2026-10-02
- Sunnyvale, CaliforniaCompilersPhysical designSoC / ASIC2026-10-02
Physical Design Staff Engineer
Synopsys
Sunnyvale, CaliforniaCompilersPhysical designSoC / ASIC2026-10-02R&D Engineering, Director-18881
Synopsys
Sunnyvale, CaliforniaRTL / HDLPhysical designSoC / ASIC2026-10-02FPGA Design Engineer
Anello
Santa Clara, CARTL / HDLVerificationCompilersFirmware2026-10-01Staff Silicon Design Engineer
Advanced Micro Devices (AMD)
Boxborough, MassachusettsRTL / HDLVerificationFirmwarePhysical design2026-10-01Senior SerDes & Analog Layout Design Engineer
Microsoft Corporation
United States, North Carolina, Raleigh, United States, Texas, Austin, United States, District of Columbia, Washington D.C., United States, Washington, Redmond, United States, Idaho, Boise, United States, Oregon, Hillsboro, United States, California, Mountain ViewPhysical designSoC / ASIC2026-10-01Lead Full Chip Floorplan Design Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLPhysical designSoC / ASIC2026-10-01- Engineering - LeuvenPhysical designSoC / ASIC2026-10-01
Analog Layout Intern - Bachelor's Degree
Marvell Asia PTE Ltd
SingaporePhysical design2026-10-01Senior Principal Engineer - Digital Design
Infineon Technologies AG
Bangalore BTPRTL / HDLFirmwarePhysical designSoC / ASIC2026-10-01Sr Principal Software Engineer, Innovus — Physical Synthesis & Optimization
Cadence Design Systems, Inc.
SAN JOSEPhysical design2026-10-01
