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154 results · page 5 of 7 · dates: UTC

CPU Microarchitecture & Logic Design Engineer
Ahead Computing
2026-08-11
Guadalajara, MXRTL / HDLPhysical design2026-08-11
Senior Physical Design Engineer – CPU PPA Optimization
Ahead Computing
2026-08-11
Guadalajara, MXRTL / HDLPhysical design2026-08-11
CPU Physical Design Engineer
Qualcomm Technologies, Inc.
2026-08-10
Bangalore, IndiaRTL / HDLPhysical designFPGA2026-08-10
CPU Server Physical Design Timing Engineer
Qualcomm Technologies, Inc.
2026-08-07
Santa Clara, California, United States of AmericaRTL / HDLPhysical designSoC / ASIC2026-08-07
Lead CPU Design Verification Engineer
Advanced Micro Devices (AMD)
2026-08-06
Hyderabad, IndiaRTL / HDLVerificationSoC / ASIC2026-08-06
Core CPU Physical Design Engineer (Lead/Staff/Sr Staff)
Qualcomm Technologies, Inc.
2026-08-06
Bangalore, IndiaRTL / HDLPhysical designFPGA2026-08-06
Senior Design Verification Engineer – High Performance CPU Core
SiFive
2026-08-04
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-04
Staff Design Verification Engineer – High Performance CPU Core
SiFive
2026-08-04
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-04
Senior Design Verification Engineer – High Performance CPU Core
SiFive
2026-08-04
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-04
Staff Design Verification Engineer – High Performance CPU Core
SiFive
2026-08-04
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-04
Staff Design Verification Engineer – High Performance CPU Core
SiFive
2026-08-04
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-04
CPU Micro-architect/RTL Designer
Qualcomm Technologies, Inc.
2026-08-04
Austin, Texas, United States of America, Santa Clara, CA, USARTL / HDLVerificationPhysical design2026-08-04
CPU Physical Design Engineer, Senior to Senior Staff Level
Qualcomm Technologies, Inc.
2026-08-04
Hsinchu City, TaiwanRTL / HDLPhysical designSoC / ASIC2026-08-04
Staff RTL Design Engineer - CPU Midcore
SiFive
2026-07-31
Cambridge, England, United KingdomRISC-VRTL / HDLVerificationCompilers2026-07-31
Principal Design Verification Engineer – High Performance CPU Subsystem
SiFive
2026-07-31
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-07-31
Staff RTL Design Engineer - CPU LS/PF/MMU
SiFive
2026-07-31
Santa Clara, California, United StatesRISC-VRTL / HDLVerificationPhysical design2026-07-31
CPU Design Verification Engineer
SiFive
2026-07-31
Hyderabad, IndiaRISC-VRTL / HDLVerification2026-07-31
Principal Design Verification Engineer – CPU Core LSU
SiFive
2026-07-31
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-07-31
Principal Design Verification Engineer – CPU Core Hardware Prefetch
SiFive
2026-07-31
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-07-31
Principal Design Verification Engineer – CPU Core Frontend
SiFive
2026-07-31
Austin, Texas, United StatesRISC-VRTL / HDLVerificationCompilers2026-07-31
CPU Power-Management Design Engineer
SiFive
2026-07-31
Santa Clara, California, United StatesRISC-VRTL / HDLVerificationPhysical design2026-07-31
CPU SRAM Design Engineer - Sr Staff / Principal
Qualcomm Technologies, Inc.
2026-07-30
Austin, Texas, United States of AmericaRTL / HDLVerificationPhysical design2026-07-30
CPU Micro-Architecture and RTL Design Engineer (RISC-V)
Qualcomm Technologies, Inc.
2026-07-30
Santa Clara, California, United States of America, Austin, Texas, United States of AmericaRISC-VRTL / HDLVerificationPhysical design2026-07-30
Logic Design Engineer, CPU Core
NVIDIA Corporation
2026-07-26
Israel, YokneamRTL / HDLPhysical design2026-07-26
PE- CPU Software & Hardware Co-Design Engineer (ML Systems)
Qualcomm Technologies, Inc.
2026-07-23
Bangalore, India2026-07-23