Sr Principal Product Engineer
Cadence Design Systems, Inc.
NOIDARTL / HDLVerificationSoC / ASIC2026-09-20
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Lead Digital Verification Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerification2026-09-20Principal AI Forward Deployment Engineer
Cadence Design Systems, Inc.
HOME ORRTL / HDLPhysical design2026-09-20Firmware Design Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerificationFirmwarePhysical design2026-09-20Lead Design Engineer
Cadence Design Systems, Inc.
CARYRTL / HDLPhysical designSoC / ASIC2026-09-20Ingénieur en conception de micrologiciel - Firmware Design Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerificationFirmwarePhysical design2026-09-20Ingénieur en conception de micrologiciel - Firmware Design Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerificationFirmwarePhysical design2026-09-20Principal Product Engineer - Memory IP
Cadence Design Systems, Inc.
NanjingRTL / HDLPhysical design2026-09-20Lead Digital Verification Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerification2026-09-20Sr Principal Design Engineer
Cadence Design Systems, Inc.
FELDKIRCHEN (Munich)RTL / HDLPhysical designSoC / ASIC2026-09-20Lead Design Engineer ( Synthesis/LEC/CLP )
Cadence Design Systems, Inc.
BANGALORERTL / HDLSoC / ASIC2026-09-20Design Verification Architect / Director
Cadence Design Systems, Inc.
SAN JOSERTL / HDLVerification2026-09-20Product Engineer II, Conformal
Cadence Design Systems, Inc.
SAN JOSERTL / HDL2026-09-20GPU Architect - New College Graduate 2027
NVIDIA Corporation
China, ShanghaiRTL / HDL2026-09-20Senior Manager, Layout
Analog Devices, Inc.
Ireland, LimerickRTL / HDLPhysical design2026-09-19Director, Digital Design
Analog Devices, Inc.
India, Bangalore, RMZRTL / HDLPhysical designSoC / ASICFPGA2026-09-19Cross-Functional Engineer, Staff
Qualcomm Technologies, Inc.
Toronto, Ontario, Canada, Ottawa, Ontario, CanadaRTL / HDLFirmwareSoC / ASIC2026-09-19- United States Off-siteRTL / HDLVerificationSoC / ASICFPGA2026-09-19
- United States Off-siteRTL / HDLVerificationFirmwareSoC / ASIC2026-09-19
- United States Off-siteRTL / HDLVerificationFirmwareSoC / ASIC2026-09-19
- United States Off-siteRTL / HDLVerificationSoC / ASICFPGA2026-09-19
Technicien Exploitation Procédés déchets nucléaires H/F
commissariat à l'énergie atomique et aux énergies alternatives (CEA)
21120 Is-sur-TilleRTL / HDL2026-09-19Senior GPU Verification Engineer
Imagination Technologies Group Ltd.
Hyderabad IndiaRTL / HDLVerificationPhysical designSoC / ASIC2026-09-19Next Gen CPU Power Management RTL Design Engineer
Advanced Micro Devices (AMD)
Santa Clara, CaliforniaRTL / HDLFirmwarePhysical designSoC / ASIC2026-09-18Senior Physical Design Engineer
Microsoft Corporation
United States, Oregon, Hillsboro, United States, California, Mountain View, United States, Texas, Austin, United States, North Carolina, Raleigh, United States, Washington, RedmondRTL / HDLPhysical design2026-09-18
