Sr. Principal Technical Quality Engineer
Cadence Design Systems, Inc.
TORONTO 022026-09-20
Loading roles
The job board
Find work worth doing.
35,900 open roles across 332 companies · 4,002 added this week
3,188 results · page 71 of 128 · dates: UTC
Ingénieur en conception de micrologiciel - Firmware Design Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerificationFirmwarePhysical design2026-09-20Principal Product Engineer - Memory IP
Cadence Design Systems, Inc.
NanjingRTL / HDLPhysical design2026-09-20Lead Digital Verification Engineer
Cadence Design Systems, Inc.
MOUNT-ROYAL (Montreal)RTL / HDLVerification2026-09-20Sr Principal Design Engineer
Cadence Design Systems, Inc.
FELDKIRCHEN (Munich)RTL / HDLPhysical designSoC / ASIC2026-09-20Software Engineer II
Cadence Design Systems, Inc.
SHANGHAI2026-09-20Lead Design Engineer ( Synthesis/LEC/CLP )
Cadence Design Systems, Inc.
BANGALORERTL / HDLSoC / ASIC2026-09-20Staff Systems Engineer (Infrastructure Automation & Virtualization)
Cadence Design Systems, Inc.
CORK 012026-09-20AI Engineer, Ontologies & Knowledge Graphs
Cadence Design Systems, Inc.
LIVONIA 012026-09-20Product Engineer II, Conformal
Cadence Design Systems, Inc.
SAN JOSERTL / HDL2026-09-20PDK/CAD Design Automation Engineer
Qualcomm Technologies, Inc.
Tijuana, Baja California, MexicoPhysical design2026-09-20Cross-Functional Engineer, Staff
Qualcomm Technologies, Inc.
Toronto, Ontario, Canada, Ottawa, Ontario, CanadaRTL / HDLFirmwareSoC / ASIC2026-09-19Quantum PDK Design Manual Engineer
MIPS Tech LLC.
Malta, New York, United States of America, Essex Junction, Vermont, United States of America2026-09-19Next Gen CPU Power Management RTL Design Engineer
Advanced Micro Devices (AMD)
Santa Clara, CaliforniaRTL / HDLFirmwarePhysical designSoC / ASIC2026-09-18Senior Physical Design Engineer
Microsoft Corporation
United States, Oregon, Hillsboro, United States, California, Mountain View, United States, Texas, Austin, United States, North Carolina, Raleigh, United States, Washington, RedmondRTL / HDLPhysical design2026-09-18Design for Test Lead
Neurophos
Austin, TexasRTL / HDLCompilersPhysical designSoC / ASIC2026-09-18- Engineering - Hokkaido2026-09-18
ASIC Design Verification Lead
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLVerificationSoC / ASIC2026-09-18FPGA/RTL Design Engineering Manager with High-Speed Protocols (HSIO) (PCIE/Ethernet/USB)
Advanced Micro Devices (AMD)
Hyderabad, IndiaRTL / HDLFPGA2026-09-18Staff Engineer Simulation and Package Design Methodology (f/m/div)
Infineon Technologies AG
Villach2026-09-18Staff Physical Design Engineer
Advanced Micro Devices (AMD)
Penang, MalaysiaRTL / HDLCompilersPhysical design2026-09-18Staff Power Module Design Engineer
Analog Devices, Inc.
US, CA, San Jose, Rio RoblesFirmwareFPGA2026-09-18Senior ASIC Design Engineer - DFT
NVIDIA Corporation
US, CA, Santa ClaraRTL / HDLVerificationPhysical designSoC / ASIC2026-09-18Senior Physical Design Engineer
Qualcomm Technologies, Inc.
Noida, Uttar Pradesh, IndiaPhysical designSoC / ASIC2026-09-18Senior Lead Physical Design Engineer
Qualcomm Technologies, Inc.
Noida, Uttar Pradesh, IndiaPhysical designSoC / ASIC2026-09-18
