Digital Design Engineer Intern
Analog Devices, Inc.
US, NC, DurhamRTL / HDLPhysical designFPGA2026-09-06
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Senior Digital Design Engineer
Analog Devices, Inc.
India, Bangalore, RMZRTL / HDLVerificationPhysical design2026-09-06Communications System Architect
Analog Devices, Inc.
US, NC, DurhamRTL / HDLFPGA2026-09-06Field Applications Engineer
Lattice Semiconductor Corporation
San Jose, CARTL / HDLSoC / ASICFPGA2026-09-06Design Verification Eng 2(IP/SoC)
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLVerificationSoC / ASICFPGA2026-09-06Sr. RTL Design Engineer
Advanced Micro Devices (AMD)
Bangalore, IndiaRTL / HDLPhysical designSoC / ASIC2026-09-06- Spokane ValleyRTL / HDL2026-09-05
- San JoseRTL / HDL2026-09-05
Principal Engineer – CAD Design Engineering & EDA Infrastructure
Lattice Semiconductor Corporation
San Jose, CARTL / HDLPhysical designSoC / ASICFPGA2026-09-05GPU Performance Architect
Advanced Micro Devices (AMD)
Austin, TexasRTL / HDLCompilersKernel / LinuxPhysical design2026-09-04Physical Design Engineer
Marvell Asia PTE Ltd
Cordoba, ArgentinaRTL / HDLPhysical designSoC / ASIC2026-09-04Staff Design Engineer - SoC & RTL
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLSoC / ASICFPGA2026-09-04Sr Design Verification Eng
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLVerificationFirmwareSoC / ASIC2026-09-04Senior Engineer, Post Silicon Validation
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLFPGA2026-09-04Silicon Validation Engineer
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLFPGA2026-09-04Staff Engineer - Post Siiicon Validation
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLFPGA2026-09-04Senior Manager, Post-Silicon Validation Engineering
Lattice Semiconductor Corporation
Pune, IndiaRTL / HDLFPGA2026-09-04- Austin, Texas, United States; Santa Clara, California, United StatesRISC-VRTL / HDLVerificationCompilers2026-09-04
Sr. Staff Design Verification Engineer
Advanced Micro Devices (AMD)
Bellevue, WashingtonRTL / HDLVerificationCompilersPhysical design2026-09-04Sr. Staff ASIC Design Engineer
Advanced Micro Devices (AMD)
San Jose, CaliforniaRTL / HDLVerificationCompilersPhysical design2026-09-04Staff Modeling Architect
Neurophos
Austin, TexasRTL / HDLVerificationCompilersKernel / Linux2026-09-04- Austin, TexasRTL / HDLKernel / Linux2026-09-04
Modeling Architect
Neurophos
Austin, TexasRTL / HDLCompilersKernel / Linux2026-09-04Senior Physical Design and Timing Engineer
NVIDIA Corporation
US, MA, WestfordRTL / HDLPhysical designSoC / ASIC2026-09-04CPUSS Verification (Power Management), Staff/ Senior Staff
Qualcomm Technologies, Inc.
Bangalore, IndiaRTL / HDLVerificationFirmwareSoC / ASIC2026-09-04
