ASIC Design Engineer, Clocks
NVIDIA Corporation
China, ShanghaiRTL / HDLVerificationPhysical designSoC / ASIC2026-08-03
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System Design Engineer - LDE (RDSS Intern)
NVIDIA Corporation
Taiwan, Taipei2026-08-03Senior Chip Design Engineer
NVIDIA Corporation
Israel, Tel AvivRTL / HDL2026-08-03GPU System Integration Engineer
MediaTek Inc
HsinChuRTL / HDLFPGA2026-08-02Senior Digital Design Engineer
MediaTek Inc
HsinChuRTL / HDLPhysical design2026-08-02MCU/DSP design engineer
MediaTek Inc
HsinChu2026-08-02GPU Emulation and Design Verification Engineer
MediaTek Inc
HsinChuVerificationFPGA2026-08-02- Santa Clara, California, United StatesRISC-VRTL / HDLVerificationCompilers2026-08-01
SOC Clocks RTL Design Engineer
NVIDIA Corporation
Israel, Tel Aviv, Israel, Beer Sheva, Israel, YokneamRTL / HDLVerificationFirmwarePhysical design2026-08-01Senior SOC Clocks RTL Design Engineer
NVIDIA Corporation
Israel, Tel Aviv, Israel, YokneamRTL / HDLVerificationFirmwarePhysical design2026-08-01Laser Design Engineer
Volantis Semiconductor
Remote - SF / Boston / AustinRemote2026-07-31PIC Design Engineer
Volantis Semiconductor
Hybrid Remote/SF Bay Area/Austin/BostonRemote2026-07-31Digital Design Verification Engineer
Advanced Micro Devices (AMD)
MARKHAM, CanadaRTL / HDLVerification2026-07-31Senior Mechanical Design Engineer
The Charles Stark Draper Laboratory, Inc.
Odon, IN2026-07-31Electronics Hardware Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MAFPGA2026-07-31Sr. Electromagnetic Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MAFirmware2026-07-31Distinguished Systems Engineer for Embedded Microsystems Architecture and Design
The Charles Stark Draper Laboratory, Inc.
Cambridge, MAFirmwareSoC / ASICFPGASecurity2026-07-31Senior Analog/Mixed Signal ASIC Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MARTL / HDLPhysical designSoC / ASIC2026-07-31FPGA Design Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MARTL / HDLVerificationFirmwareSoC / ASIC2026-07-31IC Packaging Design & Layout Engineer
The Charles Stark Draper Laboratory, Inc.
Cambridge, MAPhysical design2026-07-31Digital IC Design Junior Engineer
Marvell Asia PTE Ltd
Cordoba, ArgentinaRTL / HDLFirmwareSoC / ASIC2026-07-31Digital IC Design/Verification Engineer
Marvell Asia PTE Ltd
Cordoba, ArgentinaRTL / HDLVerificationFirmwarePhysical design2026-07-31Digital IC Design Engineer
Marvell Asia PTE Ltd
Cordoba, ArgentinaRTL / HDLVerificationPhysical designFPGA2026-07-31Principal, IC Digital Design Engineer
Marvell Asia PTE Ltd
Irvine, CARTL / HDLFirmwarePhysical designSoC / ASIC2026-07-31Staff Engineer, Design Verification Engineering
Analog Devices, Inc.
US, AZ, Chandler, East ElliotRTL / HDLVerificationPhysical design2026-07-31
