Lint / CDC / Synthesis Quality · IP & Chip Integration · AI-Augmented Design Flows · CI/CD for RTL On-Site Monday-Friday - Bay Area, CA / Vancouver, BC / Toronto, ON Full-Time - Equity Participation - Comprehensive Benefits ABOUT THE RO
RTL / HDL jobs 3,269
Register-transfer-level and HDL design in Verilog, SystemVerilog, VHDL and Chisel.
Roles 2,791–2,820 of 3,269, newest first.
- Bay Area, Vancouver or TorontoRTL / HDLVerificationCompilersMay 13, 2026
- Bay AreaRTL / HDLPhysical designSoC / ASICMay 11, 2026
ABOUT THE ROLE As a Sr Staff / Principal CAD & Design Methodology Engineer, you will be the technical architect of RTL-to-GDSII flows and digital design infrastructure for advanced SoC products. You will define and deploy multi-vendor, mult
- Bay AreaRTL / HDLPhysical designSoC / ASICMay 11, 2026
ABOUT THE ROLE As a Sr Staff / Principal CAD & Design Methodology Engineer, you will be the technical architect of RTL-to-GDSII flows and digital design infrastructure for advanced SoC products. You will define and deploy multi-vendor, mult
GPU HW Design Engineer
MediaTek Inc
HsinChuRTL / HDLVerificationPhysical designMay 11, 2026Role and Responsibilities • Collaborate with architects and design leads to define and document micro architecture of sub-modules of shader subsystem • RTL coding and deliver high quality scalable design to meet PPA requirements • Collabora
GPU HW Micro-Architecture Engineer
MediaTek Inc
HsinChuRTL / HDLPhysical designSoC / ASICMay 11, 2026Role and Responsibilities • Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP • Collaborate with Arch/Model/SW team, develop cluster level HW specification t
- Austin, TX$194K • Multiple RangesRTL / HDLFirmwarePhysical designMay 11, 2026
ABOUT OLIX AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a
FPGA Firmware Engineer / FPGA Design Engineer
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLKernel / LinuxFirmwareMay 11, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation exper
EDA/CAD SW Engineer (Multiple Levels)
Qualcomm Technologies, Inc.
San Diego, California, United States of AmericaRTL / HDLCompilersPhysical designMay 11, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Qualcomm Technologies Inc's Global CAD team develops tools, flows, and methodologies for different aspects of VLSI d
VLSI Design Engineer for Server / Data Center Products
Qualcomm Technologies, Inc.
San Diego, California, United States of America, Santa Clara, CA, Austin, TX, USARTL / HDLSoC / ASICFPGAMay 8, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation exper
- Delft, Zuid-Holland, NetherlandsRTL / HDLSoC / ASICFPGAMay 8, 2026
Join our cutting-edge start-up adventure! Who are we? Join the Revolution in GNSS and IoT Connectivity At Qualinx, we’re not just building chips, we’re engineering the future fabric of the connected world. As a pioneering semiconductor s
SoC Architect
Qualinx
Delft, Zuid-Holland, NetherlandsRTL / HDLVerificationKernel / LinuxMay 8, 2026Join our cutting-edge start-up adventure! Who are we? Join the Revolution in GNSS and IoT Connectivity At Qualinx, we’re not just building chips, we’re engineering the future fabric of the connected world. As a pioneering semiconductor s
GPU Design Verification Engineer
MediaTek Inc
HsinChuRTL / HDLVerificationPhysical designMay 7, 2026- Collaborate with architects and cross-functional teams to understand GPU specs and define verification strategies. - Develop SystemVerilog/UVM test frameworks and co-simulation environments; verify GPU logic at unit, subsystem, and top le
Senior System Simulation Architect
NVIDIA Corporation
US, CA, Santa Clara, US, NC, Durham, US, TX, Austin, US, OR, HillsboroRTL / HDLKernel / LinuxFirmwareMay 7, 2026Do you want to help drive the development of CPU architectures to fuel the explosive growth in artificial intelligence (AI) / deep learning (DL), high-performance computing (HPC), gaming, virtual reality, and autonomous vehicles? Come join
Senior Mixed Signal Design Engineer
NVIDIA Corporation
Taiwan, Taipei, Taiwan, HsinchuRTL / HDLMay 7, 2026We are looking for a Senior Mixed-Signal/Analog/IO Circuit Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed memory interface designs. NVIDIA has continuou
FY27 Intern - Engineering Internship 2027 - 6 months, Cork
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLFirmwareSoC / ASICMay 7, 2026Company: QT Technologies Ireland Limited Job Area: Interns Group, Interns Group > Interim Intern General Summary: About The Role The SnapDragon Engineering team in Cork, Ireland is seeking interns across our Digital, Analog and Embedded
Physical Design Expert
Mobileye Vision Technologies Ltd.
Haifa, IsraelRTL / HDLPhysical designSoC / ASICMay 6, 2026Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to
ASIC Design Engineer (Hardware Security)
Qualcomm Technologies, Inc.
San Diego, California, United States of America, Santa Clara, California, United States of AmericaRTL / HDLPhysical designSoC / ASICMay 6, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation exper
STA Design Engineer - Static Timing Analysis - Cork, Ireland
Qualcomm Technologies, Inc.
Cork, IrelandRTL / HDLPhysical designSoC / ASICMay 6, 2026Company: QT Technologies Ireland Limited Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Job DescriptionAs a Qualcomm STA Engineer, you will perform static timing analysis, develop timing constraints,
- Irvine, CARTL / HDLFirmwareMay 5, 2026
The Interconnect Solutions team is searching for qualified candidates to join our fast-growing team. As a member of this dynamic team, you will work on state-of-the-art next generation electrical and optical transceivers for data centers se
Power Methodology and Modeling Engineer - New College Grad 2026
NVIDIA Corporation
US, TX, AustinRTL / HDLPhysical designSoC / ASICMay 5, 2026As a member of the Architecture Energy Modeling Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy model
Physical Design Engineer, PnR
Tenstorrent
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United StatesRISC-VRTL / HDLCompilersMay 4, 2026Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software
Senior ASIC Design Verification Engineer - LPU
NVIDIA Corporation
Remote - CanadaRemoteRTL / HDLVerificationSoC / ASICMay 4, 2026NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited po
GPU Design Engineer
Qualcomm Technologies, Inc.
Austin, Texas, United States of AmericaRTL / HDLVerificationPhysical designMay 4, 2026Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > GPU ASICS Engineering General Summary: We are seeking an accomplished Principal‑ or Director‑level technical leader to lead a high‑performance RTL Desi
Digital IC Designer for Image Processing
MediaTek Inc
ChuPeiRTL / HDLPhysical designMay 3, 2026We are seeking a creative and hands-on Digital IC Designer to join our central image processing team. This role is responsible for developing picture quality and image processing technologies across all of MediaTek's product lines, includin
- Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United StatesRISC-VRTL / HDLVerificationMay 1, 2026
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software
Physical Design Engineer
Tenstorrent
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United StatesRISC-VRTL / HDLCompilersMay 1, 2026Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software
- San JoseRTL / HDLPhysical designSoC / ASICMay 1, 2026
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are hea
Senior Hardware Engineer
OmniDesign
MilpitasRTL / HDLFirmwareSoC / ASICMay 1, 2026Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores, from 28nm down through advanced FinFET nodes, enabling differentiated system-on-chip (SoC) solutions. Our technology fuels innovation in critical
Staff Chip Design Engineer - AI
Cognichip
🇨🇦 TorontoRTL / HDLVerificationPhysical designMay 1, 2026**Job Title** Staff Chip Design Engineer - AI **Job description** **Staff Chip Design Engineer - AI** Why this matters At Cognichip, we're not just building AI; we're enabling our customers to harness the power of AI to transform their
Staff ASIC Design Engineer
Cognichip
🇨🇦 TorontoRTL / HDLPhysical designSoC / ASICMay 1, 2026**Job Title** Staff ASIC Design Engineer **About Cognichip** At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. Our platform combines large proprietary models, age