Lead SoC Architect
Speedata
SoC and ASIC architecture, integration and chip design.
Roles 2,641–2,670 of 4,391, newest first.
Speedata
Shenzhen Jaguar Microsystems Co., Ltd.
岗位职责: • 参与智能网卡芯片IP级或SoC级设计开发; • 负责芯片IP或SoC架构规划和功能设计; • 领导团队完成相关IP或SoC的开发及质量交付。 任职要求: • 本科以上学历,电子,计算机,通信相关专业; • 有网络或者计算,存储领域相关芯片开发经验; • 熟悉Ethernet, TCP/IP等网络相关协议,并有相关产品开发经验; • 或者熟悉PCIe,Virtio,RDMA,NVME等相关协议,并有相关产品开发经验; • 熟悉SoC体系结构者优
岗位职责: • 参与智能网卡芯片IP级或SOC级功能验证; • 与IC设计工程师沟通,参与所负责的IP或SOC验证功能点分解和验证计划制定; • 基于UVM验证方法学,参与所负责IP或SOC级别的仿真验证环境搭建; • 使用SystemVerilog和C语言开发测试向量并进行回归测试; • 参与计划及实施各种覆盖率分析。 任职要求: • 熟悉 system Verilog, UVM 以及 formal 验证方法; • 有开发 scalable and port
岗位职责: • 参与智能网卡芯片IP级或SOC级设计开发; • 负责实现模块的设计代码编写; • 和验证人员一起完成IP或SOC的交付,保证测试覆盖。 任职要求: • 本科以上学历,电子,计算机,通信相关专业; • 熟悉Verilog/VHDL/SystemVerilog,熟悉FPGA或ASIC相关开发工具; • 熟悉Ethernet, TCP/IP等网络相关协议; • 或者熟悉PCIe,Virtio,RDMA等相关协议; • 有芯片成功流片者优先。
岗位职责: • 负责DPU智能网卡芯片模块或子系统建模; • 负责搭建和调试模块、子系统、芯片级系统仿真环境; • 设计架构仿真用例、仿真执行,进行芯片资源测算,对资源、性能优化、架构方案提供支撑或改进建议,帮助架构师完成架构设计; • 配合芯片驱动仿真软件行为合理性,与实际驱动界面保持一致。 任职要求: • 熟悉ASIC体系结构和系统性能,满足以下条件(一个或多个): • 熟练使用 C++,system C,Python语言,具有至少一种语言2年或以上项目开发
Semidynamics Technology Services, S.L.
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HyperAccel
HyperAccel
HyperAccel
HyperAccel