Principal Engineer, Hardware Design (AI2550)

Description Job Title: Principal Engineer, Hardware Design Job Location: Bangalore, India (This position requires a full-time, on-site presence in our Bangalore, India Office) Job ID: AI2550 Job Description: SiMa.ai is looking for a Principal Engineer to provide technical leadership for the RISC CPU IP used in our MLSoC™. In this role, you will guide the CPU IP’s architecture, design, modification, and integration, while working hands-on with RTL and design implementation. You will partner with architecture, verification, emulation, physical design, and SoC teams to make key technical decisions and deliver a robust CPU IP that meets system-level functionality, performance, and integration requirements. You will also help improve design methods and raise the quality of execution across the team. Role & responsibilities: • Set the technical direction for the RISC CPU IP and lead its ongoing development and integration. • Drive CPU microarchitecture decisions with architecture and SoC teams, balancing functionality, performance, power, and implementation constraints. • Lead significant CPU RTL changes and optimisations, including design reviews and resolution of complex design issues. • Guide the CPU IP through synthesis, static timing analysis, equivalence checking, CDC, linting, and other quality checks. • Partner with verification and emulation teams on verification strategy, debug, coverage closure, and issue resolution. • Work with physical design teams on floor planning, timing closure, and implementation trade-offs. • Lead CPU IP integration and support chip validation, silicon bring-up, and characterisation. • Coordinate with ML accelerator and SoC teams to resolve system-level dependencies and ensure the CPU IP meets platform requirements. • Establish and improve design methodology, quality standards, and reusable flows for CPU IP development. • Mentor engineers and provide technical guidance across teams. Minimum Requirements: • Bachelor’s or Master’s degree in electrical engineering, computer engineering, or a related field. • 15+ years of professional experience in CPU IP design, SoC design, or a related hardware engineering area. • Deep understanding of CPU architecture and a strong record of developing, modifying, or integrating CPU IP. • Extensive experience with RTL design and microarchitecture, including leading complex design changes. • Strong experience across the ASIC development lifecycle, including synthesis, timing analysis, verification, emulation, physical design, or silicon bring-up. • Demonstrated ability to lead technical decisions and drive cross-functional issues to resolution. Preferred Qualifications • Experience with RISC CPU cores. • Experience with ARM CPUs and associated bus protocols. • Experience integrating CPU IP into complex SoCs, especially SoCs that include ML accelerators. • Experience mentoring engineers or leading technical work across teams. Personal Attributes • Provides clear technical direction and takes accountability for outcomes. • Combines architectural thinking with practical, hands-on problem solving. • Communicates effectively across engineering teams and handles difficult technical discussions professionally. • Builds alignment, shares knowledge, and helps others grow. • Demonstrates integrity, sound judgment, and a collaborative approach.