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FPGA Engineer (Prototyping)

RaiderChip

On-Site (Solares, Spain) • Full-timeRequirements: • Use FPGA emulation to stress, debug, and validate ASIC-designs • Leverage long-running, proven FPGA prototypes as functional reference • Validate functionality through SW simulation and HW emulation • Collaborate closely with ASIC frontend and verification engineers • Drive issue detection, root-cause analysis, and fix validation • Strong experience with RTL simulation and FPGA toolchains (AMD/Xilinx)FPGAPosted Oct 20, 2026
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Original posting: raiderchip.ai

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RISC-V ecosystem

RaiderChip in the RISC-V ecosystem

AI hardware · AI · ES · founded 2024

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More roles at RaiderChip

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  • Senior Software Engineer

    RaiderChip

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    On-Site (Solares, Spain) • Full-timeRequirements: • Mandatory expert-level Python and C • Minimum 8 years of professional software development experience • Design, implement, and maintain high-quality software components • Write efficient, clean, and maintainable code • Collaborate with hardware and systems teams • Ability to work independently and deliver reliablyOct 20, 2026

  • Software Team Lead

    RaiderChip

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    On-Site (Solares, Spain) • Full-timeRequirements: • Mandatory expert-level Python and C • Senior profile with >10 years of professional software experience • Lead and mentor a team of software engineers • Maintain hands-on involvement in coding and architecture • Enforce code quality, best practices, and technical standards • Review designs, pull requests, and critical implementations • Proven ability to balance leadership and deep technical workOct 20, 2026

  • ASIC Backend Engineer

    RaiderChip

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    On-Site (Solares, Spain) • Full-timeRequirements: • Own the technical oversight of ASIC back-end executed by design service partners • Review, challenge, and validate P&R, timing closure, DRC/LVS, and sign-off results • Define and review backend constraints and deliverables • Strong understanding of physical design flows and trade-offs • Working experience with Synopsys tools • Proven experience with full ASIC tapeouts (strong plus)SoC / ASICOct 20, 2026

  • ASIC Verification Engineer

    RaiderChip

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    On-Site (Solares, Spain) • Full-timeRequirements: • Develop and execute comprehensive verification strategies for ASIC designs • Create simulation environments to aggressively validate functionality • Leverage existing FPGA-proven designs as reference and validation baseline • Strong experience with RTL simulation and verification methodologies • Working experience with Synopsys toolsVerificationSoC / ASICOct 20, 2026