Power Management IC Design

Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > PMIC Design General Summary: Oversees definition, design, verification, and documentation of mixed‑signal integrated circuits and products in the field of Power Management, with emphasis on controller ICs and integrated high‑current power stage circuitry for compute, data center, automotive, and industrial applications. Determines IC architecture and circuit‑level specifications based on defined product and platform requirements. Is actively involved in all aspects of the design flow, from architecture implementation and simulation through transistor‑level circuit design and verification. Heavy involvement in overseeing layout execution, silicon bring‑up, characterization, and debug is expected. Requires expertise in one or more of the following engineering disciplines: power electronics (switch‑mode and linear), control theory, mixed‑signal circuit design, high‑speed and high‑drive circuits, power stage interfaces, electro‑migration and transistor reliability, and behavioral modeling. Uses design tools such as Cadence ADE, Spectre, MathWorks MATLAB, Verilog/Verilog‑AMS, SystemVerilog, Simplis, and related tools. Provides deep technical expertise to support next‑generation power management IC development. Minimum Qualifications: • Bachelor's degree in Electrical Engineering and 4+ years of relevant IC Design experience. OR Master's degree in Electrical Engineering or related field and 2+ years of relevant IC Design experience. OR PhD in Electrical Engineering or related field. • 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL. Preferred Qualifications • 3+ years of experience in analog, mixed-signal or Power Management integrated circuit design experience with a Master's Degree or PhD in Electrical Engineering. • Demonstrated experience in one or more of the following areas: Power Electronics, Control Theory, Multiphase Buck Controllers, High‑Accuracy Analog Front Ends, High‑Speed or High‑Drive Circuits, Very Low Power or Precision References, Electro‑Migration and Transistor Reliability, Behavioral Modeling, or Mixed‑Signal Verification TechniquesPrincipal Duties and Responsibilities • Uses tools/applications (i.e., Cadence ADE, Spectre, MATLAB, etc.) to execute the architecture implementation, circuit design, and verification of complex IC blocks and subsystems according to design specifications and requirements. • Owns the design and verification strategy for assigned blocks or subsystems within power management ICs, including controller circuitry and integrated high‑current power stage interfaces. • Guides layout engineers independently to generate high‑quality layouts and conducts physical and reliability verification of circuits. • Runs advanced functionality and performance checks to ensure designs meet specifications across PVT and operating conditions. • Interprets simulation, silicon characterization, and debug results, driving corrective design actions where needed. • Documents detailed design intent, architectural decisions, circuit functionality, and silicon findings for complex PMIC subsystems. • Collaborates closely with validation, test, and product engineering teams to support silicon bring‑up, characterization, qualification, and production ramp. • Maintains awareness of industry trends, competitor products, and advances in power management circuits; applies insights to ongoing and future designs. • Provides technical guidance and informal mentoring to other engineers through design reviews and technical problem solving.Level of Responsibility • Works with high independence and minimal supervision on complex design problems. • Makes decisions with moderate to high impact on product performance, schedule, and silicon success; errors may require cross‑functional involvement to resolve. • Uses clear verbal and written communication to convey complex technical information to audiences with varying levels of expertise. • Operates within prescribed project scope, schedule, and resource constraints. • Completes tasks involving multiple interdependent steps, requiring planning, prioritization, and sound engineering judgment. • Exercises creativity and technical judgment to generate original design solutions within established guidelines. • Applies deductive and inductive problem‑solving techniques where information may be incomplete or ambiguous. • May be consulted during strategic planning periods for technical input and feasibility assessment. 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Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. Pay range and Other Compensation & Benefits: $126,700.00 - $190,100.00 The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. 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