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Senior TLM Simulation Architect

SIM-V / MachineWare / MachineWare GmbH

FirmwareFull-Time | On-Site (preferred)Posted Aug 11, 2026
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Overview

Skills named in this posting

  • C++
  • RTOS
  • QEMU
Senior TLM Simulation Architect Full-Time | On-Site (preferred) About MachineWare MachineWare is an innovative and fast-growing start-up spun out of the Institute of Communication Technologies and Embedded Systems at RWTH Aachen University in 2022. We specialize in high-performance full-system simulation solutions that enable early software development and verification for cutting-edge hardware and embedded systems. Our team combines academic excellence with practical innovation to redefine simulation technology. Join us to shape the future of high-performance simulation technology and work on projects that define next-generation hardware. Role Overview As a Senior TLM Simulation Architect, you will define the architecture and optimize the performance of our next-generation simulators, influencing industry standards and enabling early-stage innovation for global customers. You’ll design and implement core simulation components in modern C++ and SystemC TLM-2.0, collaborate closely with customers and partners, and ensure project success through technical excellence and leadership. Role Overview Your Responsibilities • Architect high-performance full system simulators for complex hardware and software environments • Collaborate with customers to ensure successful project delivery and maintain long-term partnerships • Mentor and guide internal teams on best practices in software design, testing, and performance optimization • Develop and optimize key simulator components using modern C++ • Project coordination and management Required Qualifications • Master's degree (or higher) in Computer Science, Computer Engineering, Electrical Engineering, Engineering Management, or a related field • Excellent communication and collaboration skills for cross-functional and customer-facing work • 5+ years of professional experience in advanced C++ development on Linux and Windows • Strong command of modern C++ principles, patterns, and best practices • Experience with software testing, versioning, CI/CD, and collaborative development workflows Required Qualifications Preferred Qualifications (Nice to Have) • Familiarity with AI accelerator architectures, related design principles and related hardware simulation domains • Practical experience with SystemC TLM-2.0 model development and working with full-system simulators • Familiarity with low-level software development, including Linux, RTOS, AUTOSAR, and embedded systems environments • Proven ability to manage or coordinate complex technical projects • Proven contributions to or extensions of QEMU for system emulation What We Offer • Competitive, market-based compensation • Work on cutting-edge technology in a dynamic, fast-paced environment • Flat hierarchies and real responsibility from day one • A collaborative, international team of experts passionate about technology • 30 days of paid vacation and flexible working arrangements • A charming office in the heart of Aachen with bicycle parking and an espresso machine What We Offer Back to the news overview Apply Now! Would you like to work with us? Then we look forward to receiving your application. Apply Now!

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Original posting: machineware.de

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RISC-V ecosystem

SIM-V / MachineWare / MachineWare GmbH in the RISC-V ecosystem

RISC-V International: Strategic Start-Up

SIM-V is our ultra-fast, functional RISC-V instruction set simulator. | MachineWare's virtual prototypes simulate RISC-V hardware at bit-level accuracy, shortening development time and enhancing software security, stability, and quality. | MachineWare is a company based in Aachen, Germany that provides high speed instruction set simulators, including RISC V full system simulators.

  • MachineWare's SIM-V is an ultra-fast functional RISC-V instruction set simulator, and its virtual prototypes simulate RISC-V hardware for pre-silicon software development
  • Teamed with IAR and Nuclei to speed up ASIL-compliant automotive RISC-V solutions
  • Collaborated with Andes on early RISC-V software development for the AndesCore AX45MPV

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