Working Student/Intern TLM Simulation Engineer
SIM-V / MachineWare / MachineWare GmbH
FirmwarePart-Time | HybridPosted Aug 11, 2026
Overview
Skills named in this posting
- C++
- QEMU
- Virtualization
Working Student/Intern TLM Simulation Engineer
Part-Time | Hybrid
Your Profile
• Enrolled as a student in electrical engineering/computer science
• Good programming skills (Modern C++)
• Independent worker with strong problem-solving skills and attention to detail
• Interested in low-level software (TEEs, hypervisors, OS kernels, drivers, …)
• (Beneficial) Hardware modeling experience (SystemC, QEMU, …)
• (Beneficial) Proficient in C++ software development on Linux and Windows
Your Responsibilities
• Develop and test SystemC TLM-2.0-based hardware models
• Perform low-level software bring-up on full-system simulation environments
• Assist with various tasks based on your skill set and project needs
Your Responsibilities
About Us & Our Offer
MachineWare is a dynamic spin-off from the Institute of Communication Technologies and Embedded Systems at RWTH Aachen, founded in 2022. We specialize in "Virtual Platforms," advanced full-system simulators that execute unmodified target software, pushing the boundaries of system simulation technology.
• Competitive salary
• Opportunity to acquire industry-relevant skills working on cutting-edge technologies
• Collaborative and friendly team environment
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Original posting: machineware.de
RISC-V ecosystem
SIM-V / MachineWare / MachineWare GmbH in the RISC-V ecosystem
RISC-V International: Strategic Start-Up
SIM-V is our ultra-fast, functional RISC-V instruction set simulator. | MachineWare's virtual prototypes simulate RISC-V hardware at bit-level accuracy, shortening development time and enhancing software security, stability, and quality. | MachineWare is a company based in Aachen, Germany that provides high speed instruction set simulators, including RISC V full system simulators.
- MachineWare's SIM-V is an ultra-fast functional RISC-V instruction set simulator, and its virtual prototypes simulate RISC-V hardware for pre-silicon software development
- Teamed with IAR and Nuclei to speed up ASIL-compliant automotive RISC-V solutions
- Collaborated with Andes on early RISC-V software development for the AndesCore AX45MPV
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