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Compiler Engineer (P&R Heuristics)

Ubitium

VerificationCompilersPhysical designFPGAPosted Jul 23, 2026
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Skills named in this posting

  • Place and route
  • C++
  • Python
We are looking for a Compiler Engineer who will develop new heuristics for a place-and-route tool and take over its overall maintenance and integration. Focus areas include, but are not limited to: Design and implementation of heuristics based on feedback from our application engineers; taking over the ongoing maintenance and improvement of the tool; integration of an externally developed optimal solver. Prospective team members require strong C++ skills and a solid grounding in graph algorithms and optimisation; experience with Python or similar scripting languages; interest in or exposure to EDA / place-and-route, CGRA, FPGA, or compiler back-end mapping. Familiarity with ILP solvers is a plus. Master’s degree (or equivalent experience) and first relevant experience (internships, projects) welcome. Relocation required. Currently 4 days on-site, 1 day remote. Policy may change. DROP US YOUR LINKEDIN PROFILE OR CV Other Openings • Senior Software Engineer (Processor Software Stack) • Verification Engineer • Synthesis Engineer • Compiler Engineer (P&R Heuristics)

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Original posting: ubitium.com

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RISC-V ecosystem

Ubitium in the RISC-V ecosystem

RISC-V International: Strategic Start-Up

Ubitium develops a universal RISC V microprocessor designed to replace conventional processors, enabling the execution of any code, algorithm, or application for seamless and efficient computing…

  • Ubitium is building a "universal" RISC-V processor that handles CPU, GPU, DSP and FPGA-style workloads on one general-purpose RISC-V datapath
  • Debuted as enabling AI "at no additional cost" while raising $3.7M seed funding
  • Featured in RISC-V International's newsletter (December 2024) as a new RISC-V silicon startup

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