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Technology-aware design partitioning for heterogeneous systems

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Electronic systems are increasingly built from more than one technology: different process nodes, different device and memory technologies, fixed and reconfigurable fabrics, stacked or side by side in one package. Each option has its own cost, speed, energy and risk, and the boundaries between them have costs of their own. Design flows still treat the technology as a single given, and the choice of where a design should be split, and what the split itself costs, is largely left to experience. The student will work on a partitioning and exploration framework for heterogeneous systems: cost models that describe each technology option and the interfaces between them, a partitioning method that optimises power, performance, area and cost together, and an evaluation on representative designs that separates what the technology mix contributes from what the tools contribute. Type of internship : Master internship, PhD internship Duration : 6-9 months Required educational background : Electrotechnics/Electrical Engineering, Computer Science Supervising scientist(s) : For further information or for application, please contact Siva Satyendra Sahoo ( SivaSatyendra.Sahoo@imec.be ) The reference code for this position is 2026-INT-356 . Mention this reference code in your application. Imec allowance will be provided for students studying at a non-Belgian university. Applications should include the following information: resume motivation current study Incomplete applications will not be considered

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Original posting: imec-int.com

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Interuniversity Microelectronics Centre is an international research & development organization, active in the fields of nanoelectronics and digital technologies.

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