Senior Design Verification Engineer

About the role • We are seeking an experienced Design Verification Engineer to join our Bucharest based team. The ideal candidate will have a strong background in Functional verification including UVM, SystemVerilog and Real Number Modeling, in deep node designs. As a Design Verification Engineer, you will work in very close cooperation with the Digital front-end designers in the full cycle of developing complex mixed-mode SoCs from prototype to mass production.What you'll do • Architecture, definitions and documentation of DV in mixed-mode SoCs. • Test program definition and implementation • Test bench creation in UVM and System Verilog environment • Functional verification • Regression triage and test debug • Tight work and coordination with Front-end, Architecture, SW and DSP teamsRequired Qualifications • Bachelor or higher degree, in Electrical or Computer Engineering or adjacent field • At least 7 years of proven industrial experience in Design Verification. • Proven experience in embedded and mixed-mode SoC designs. • Deep knowledge in UVM and SystemVerilog. • Deep knowledge in state-of-the-art Design and DV tools. • Good familiarity with embedded SW, FPGA, and Emulators. • Strong analytical and problem-solving skills. • Excellent written and verbal communication skills. • Excellent Team player with superb teamwork capabilities.Preferred Qualifications • RNM or SVA or Formal knowledge • Experience with Front-end design flows • Understanding analog circuit designsBenefits (subject to location and local regulations) • Competitive salary and equity • Flexible vacation and time-off policy • Collaborative, fast-paced, and inclusive work environment • Opportunity to work on cutting-edge technologies with a highly cross-functional team