Staff Product Engineer
Overview
Skills named in this posting
- PCIe
- UCIe / chiplets
- Ethernet
What you'll do
• Drive product engineering strategy and action across silicon bring-up, characterization, yield learning, screening, qualification support, and production ramp
• Own product health across wafer sort, final package test, characterization, and manufacturing correlation
• Partner closely with design, DFT, test engineering, reliability, quality, and manufacturing teams to ensure product readiness
• Analyze silicon and test data to identify yield issues, systematic failures, performance limiters, and opportunities to improve quality and manufacturability
• Work directly with OSATs and foundries to deploy and sustain robust product flows in manufacturing
• Make smart tradeoffs across yield, quality, screening effectiveness, performance, cost, and ramp velocity
• Improve infrastructure, automation, and analytics for product monitoring, failure analysis, and yield learning
• Operate as an individual contributor who is comfortable getting deep into silicon, data, debug, and cross-functional execution
What you'll bring
• +5 years of experience in semiconductor product engineering, test engineering, yield engineering, or a related silicon production role
• Hands-on experience with physical silicon: wafer sort and final package test in real production environments
• Strong ownership of silicon bring-up, characterization, yield analysis, and production ramp
• Deep understanding of manufacturing flows, device screening, correlation, guard banding, binning, and outgoing quality
• Strong debug instincts and data fluency — you know how to find signal in noisy silicon and manufacturing data
• Experience working cross-functionally with design, DFT, test, reliability, quality, and operations teams
• Comfortable operating with urgency, ambiguity, and a high bar for execution
• Builder mindset: you do not wait for perfect structure — you create it
• Experience validating or characterizing high-speed IP interfaces such as LPDDR, PCIe, UCIe, MIPI, and Ethernet
• Experience validating Functional Safety mechanisms
Apply on the employer's site
Original posting: jobs.lever.co
RISC-V ecosystem
Mythic in the RISC-V ecosystem
Analog ML accelerators · AI · US · founded 2012
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