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Sr. Semiconductor Test Engineer

Mythic

Austin, TXUSD 140,000–270,000 / year-salaryPosted Oct 21, 2026
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Skills named in this posting

  • DFT
  • Mixed-signal
  • Python
What you'll own • Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp • Test programs for new silicon products, from development and debug through production release and optimization • Test methodology, coverage strategy, screening philosophy, and release criteria • Silicon bring-up, characterization, correlation, guardbanding, and test transfer into manufacturing • Yield and quality analysis: finding systematic failures and escapes and driving them to root cause • Day-to-day technical work with OSATs, foundries, and ATE vendors to deploy and sustain test flows • Tradeoffs across test coverage, cost, test time, quality, and ramp schedule • Infrastructure, automation, and analytics for production test and yield learning What you'll bring Required qualification • 5+ years in semiconductor test engineering, product engineering, or production test development • Hands-on ownership of Wafer Sort and Final Package Test • Developing, debugging, and releasing test programs on ATE platforms in production • Converting and translating test patterns from STIL, WGL, and VCD into ATE-specific pattern formats • Solid grounding in manufacturing test flows, device screening, test coverage, guardbanding, and outgoing quality • Experience taking silicon through bring-up, characterization, yield ramp, and production release • Strong debug skills and fluency with manufacturing test data • Experience working with design, DFT, product, reliability, and operations teams Preferred qualifications • Testing mixed-signal or analog silicon, including trim and calibration • Experience with AI, accelerator, or high-performance compute silicon • Experience with Advantest, Teradyne, or similar ATE platforms • Probe cards, load boards, hardware interfaces, and test hardware debug • DFT structures such as scan, MBIST, and boundary scan • Managing OSATs and other external manufacturing partners • Scripting, automation, and test-data analysis (e.g., Python, JMP, or yield-analysis tools) • A track record of reducing test time and improving yield and correlation during ramp What success looks like in your first year • Wafer Sort and Final Test flows are robust, scalable, and released to production • New products move from bring-up to manufacturing with strong coverage and few surprises • Yield issues are caught early and driven to root cause quickly • Test programs are stable, efficient, and built to scale with volume

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Original posting: jobs.lever.co

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RISC-V ecosystem

Mythic in the RISC-V ecosystem

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